FFT-SPA non-binary LDPC decoding on GPU

It is well known that non-binary LDPC codes outperform the BER performance of binary LDPC codes for the same code length. The superior BER performance of non-binary codes comes at the expense of more complex decoding algorithms that demand higher computational power. In this paper, we propose parall...

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Bibliographic Details
Main Authors: Andrade, J., Falcao, G., Silva, V., Kasai, Kenta
Format: Conference Proceeding
Language:English
Subjects:
Communications
Complexity theory
Decoding
Engines
Error correcting codes
GF(q)
GPU
Graphics processing units
Kernel
Non-binary LDPC codes
Parity check codes
Throughput
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Summary:It is well known that non-binary LDPC codes outperform the BER performance of binary LDPC codes for the same code length. The superior BER performance of non-binary codes comes at the expense of more complex decoding algorithms that demand higher computational power. In this paper, we propose parallel signal processing algorithms for performing the FFT-SPA and the corresponding decoding of non-binary LDPC codes over GF(q). The constraints imposed by the complex nature of associated subsystems and kernels, in particular the Check Nodes, present computational challenges regarding multicore systems. Experimental results obtained on GPU for a variety of GF(q) show throughputs in the order of 2 Mbps, which is far above from the minimum throughput required, for example, for real-time video applications that can benefit from such error correcting capabilities.
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.2013.6638633