A 0.5 V $W CMOS Light-to-Digital Converter Based on a Nonuniform Quantizer for a Photoplethysmographic Heart-Rate Sensor

• Published in: IEEE journal of solid-state circuits 2014-01, Vol.49 (1), p.271-288
• Main Authors: Alhawari, Mohammad, Albelooshi, Nadya A., Perrott, Michael H.
• Format: Article
• Language: English
• Subjects: Analog-to-digital converter (ADC); Delta-Sigma; digital-to-resistance converter (DRC); Dynamic range; heart-rate sensor; Inverters; laddered inverter; laddered inverter quantizer/amplifier/filter (LIQAF); light sensor; low-noise amplifier; Modulation; Noise; nonuniform quantizer; oximetry; photodetector; Photodiodes; photoplethysmographic; resistor DAC; Resistors; Sensitivity
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2013.2284349

A 0.5 V CMOS light-to-digital converter (LDC) based on a nonuniform quantizer and off-chip photodiode enables a photodiode bias current (Ibias) range spanning 4 nA to 3.5 μA while consuming less than 4 μW of power. Using an off-chip LED as a modulated light source, measurements with a photodiode current signal having modulation frequency of 1.2 Hz (72 beats per minute) and 0.5% peak-to-peak amplitude relative to I bias performed at the low and high end of the Ibias range confirm over 30 dB of SNR for an integration bandwidth spanning 0.5 to 5 Hz. Using off-chip digital signal processing of the LDC output, instantaneous period jitter (a proxy for instantaneous heart rate) is measured to be less than 0.45% (rms) of the period, and the high sensitivity of the LDC allows detection of the heart-rate signal from a finger pressed against the off-chip photodiode using only ambient light. Key circuit components of the LDC include a wide range logarithmic digital-to-resistance converter (DRC) utilizing digital multibit ΔΣ modulation to achieve fine resolution and a nonuniform quantizer based on a laddered inverter quantizer (LIQAF) which also acts as a low-noise front-end amplifier and filter.