Impact of FinFET and III-V/Ge Technology on Logic and Memory Cell Behavior

In this paper, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFETs, and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robust...

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Bibliographic Details
Published in:IEEE transactions on device and materials reliability 2014-03, Vol.14 (1), p.344-350
Main Authors: Amat, E., Calomarde, A., Almudever, C. G., Aymerich, N., Canal, R., Rubio, Antonio
Format: Magazinearticle
Language:English
Subjects:
Circuits integrats
CMOS integrated circuits
DRAM
Enginyeria electrònica
FinFETs
III-V semiconductor materials
Integrated circuit reliability
Integrated circuits
Logic circuits
Microelectrònica
Performance evaluation
Power demand
Ring oscillators
Àrees temàtiques de la UPC
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Summary:In this paper, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFETs, and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.
ISSN:1530-4388
1558-2574
DOI:10.1109/TDMR.2013.2291410