A balanced High Voltage IGBT design with ultra dynamic ruggedness and area-efficient edge termination

In this paper, a balanced High Voltage (HV) IGBT is presented. The proposed HV IGBT is composed of three technologies: Wide Cell Pitch CSTBT TM (III) for cell structure, Partial P collector utilizing LPT(II) buffer for vertical structure, and a novel area-efficient edge termination design. We called...

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Bibliographic Details
Main Authors: Ze Chen, Nakamura, Katsumi, Nishii, Akito, Terashima, Tomohide, Kawakami, Tsuyoshi
Format: Conference Proceeding
Language:English
Subjects:
Current density
Electric fields
Fabrication
Insulated gate bipolar transistors
Junctions
Switches
Voltage measurement
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Summary:In this paper, a balanced High Voltage (HV) IGBT is presented. The proposed HV IGBT is composed of three technologies: Wide Cell Pitch CSTBT TM (III) for cell structure, Partial P collector utilizing LPT(II) buffer for vertical structure, and a novel area-efficient edge termination design. We called the above edge termination design "Linearly-narrowed Field Limiting Ring (LNFLR)". The experiment results of a balanced 4500 V class IGBT show that the device maintains an excellent dynamic ruggedness with a 50% cut in edge termination width comparing to the conventional Field Limiting Ring (FLR) design. Moreover, optimizing fabrication process can further widen the process window for LNFLR dose.
ISSN:1063-6854
1946-0201
DOI:10.1109/ISPSD.2013.6694393