A Novel Programming Technique to Boost Low-Resistance State Performance in Ge-Rich GST Phase Change Memory

In this paper, we examine the problem of the drift of the low-resistance state (LRS) in phase change memories based on C or N doped and undoped Ge-rich Ge 2 Sb 2 Te 5 . A novel procedure, named R-SET technique, is proposed to boost the SET speed of these innovative phase change materials by overcomi...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on electron devices 2014-05, Vol.61 (5), p.1246-1254
Main Authors: Kiouseloglou, Athanasios, Navarro, Gabriele, Sousa, Veronique, Persico, Alain, Roule, Anne, Cabrini, Alessandro, Torelli, Guido, Maitrejean, Sylvain, Reimbold, Gilles, De Salvo, Barbara, Clermidy, Fabien, Perniola, Luca
Format: Article
Language:English
Subjects:
Circuits
Conductivity
Crystallization
Crystallization speed
Devices
Drift
Ge-rich
Germanium
Ge₂Sb₂Te₅ (GST)
Phase change
Phase change materials
phase change memories
Programming
Resistance
Temperature measurement
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this paper, we examine the problem of the drift of the low-resistance state (LRS) in phase change memories based on C or N doped and undoped Ge-rich Ge 2 Sb 2 Te 5 . A novel procedure, named R-SET technique, is proposed to boost the SET speed of these innovative phase change materials by overcoming the decrease of crystallization speed caused by Ge enrichment. The R-SET technique allows, at the same time, an optimized SET programming of the memory cell and the reduction of the LRS drift with respect to standard SET procedures. A circuit that generates the desired R-SET pulse based on a time reference scheme is proposed and discussed.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2014.2310497