A class of vector-tracing motion estimation architectures for MPEG2 type coding for TV and HDTV

A class of motion estimation VLSI architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality...

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Bibliographic Details
Main Authors: Gumm, M., Mombers, F., Dogimont, S., Mlynek, D.
Format: Conference Proceeding
Language:English
Subjects:
Digital video broadcasting
Genetics
HDTV
Motion estimation
Redundancy
Transform coding
Very large scale integration
Video compression
Video sequences
Online Access:Request full text
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Summary:A class of motion estimation VLSI architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same architecture principle can be used to build HDTV capable motion estimation devices.
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.1998.678165