Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation

Network-on-Chip (NoC) is the most promising communication architecture for modern System-on-Chip (SoC). A system level analysis with a sound NoC model may provide an efficient NoC implementation. In this paper, we propose an accurate NoC model for performance evaluation based on Timed and Colored Pe...

Full description

Saved in:
Bibliographic Details
Main Authors: Silveira, Jarbas, Cortez, Paulo Cesar, Cordeiro Barroso, Giovani, Marcon, Cesar
Format: Conference Proceeding
Language:English
Subjects:
Analytical models
Clocks
latency evaluation
Mathematical model
Network-on-chip
NoC
Performance analysis
Petri Net Modeling
Routing
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Network-on-Chip (NoC) is the most promising communication architecture for modern System-on-Chip (SoC). A system level analysis with a sound NoC model may provide an efficient NoC implementation. In this paper, we propose an accurate NoC model for performance evaluation based on Timed and Colored Petri Net (TCPN). The TCPN provides a detailed modeling of discrete event systems, enabling further evaluation of logical and temporal aspects with great precision. Experimental results with a 5×5 mesh NoC under synthetic and real traffic situations demonstrate the TCPN model efficiency in the latency predictability with low errors when compared with VHDL/SystemC simulation. Additionally, this work shows the ability of the model to allow fast building of different models and changes upon NoC architectural features such as routing algorithm and buffer length.
ISSN:1948-3287
1948-3295
DOI:10.1109/ISQED.2014.6783306