Flip-chip bonding on 6-/spl mu/m pitch using thin-film microspring technology

Bonding-pad densities on high-performance integrated-circuit chips are beginning to exceed the limits of available interconnect technologies. Also, stresses due to thermal mismatch in flip-chipped packages are reducing time to contact failure. We have addressed both of these problems by microlithogr...

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Bibliographic Details
Main Authors: Smith, D.L., Fork, D.K., Thornton, R.L., Alimonda, A.S., Chua, C.L., Dunnrowicz, C., Ho, J.
Format: Conference Proceeding
Language:English
Subjects:
Bonding
Fatigue
Packaging
Routing
Soldering
Springs
Testing
Thermal conductivity
Thermal stresses
Transistors
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Summary:Bonding-pad densities on high-performance integrated-circuit chips are beginning to exceed the limits of available interconnect technologies. Also, stresses due to thermal mismatch in flip-chipped packages are reducing time to contact failure. We have addressed both of these problems by microlithographically fabricating highly elastic cantilever springs in linear arrays on pitches down to 6 /spl mu/m. We have soldered test arrays of 52 springs on this pitch to Si chips with 100% contact yield and good solder wetting to every spring. The fine-pitch capability also facilitates off-chip routing; the very high compliance of the springs should avoid thermal fatigue; and the low thermal conductance along the springs should allow fast-cycle soldering of chips to multichip modules as well as replacement of chips subsequently testing faulty.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.1998.678714