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Electrical modeling of the chip scale BGA

The CSBGA package-modeling program can rapidly generate a model from a specific description of a package or from partial information when only a rough approximation is needed. This innovative new software is targeted for the engineer who, at his desktop PC or workstation, can rapidly generate an acc...

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Main Authors: Caggiano, M.F., Brush, R.M., Kleban, J.T., Chuaypradit, P.J.
Format: Conference Proceeding
Language:English
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creator Caggiano, M.F.
Brush, R.M.
Kleban, J.T.
Chuaypradit, P.J.
description The CSBGA package-modeling program can rapidly generate a model from a specific description of a package or from partial information when only a rough approximation is needed. This innovative new software is targeted for the engineer who, at his desktop PC or workstation, can rapidly generate an accurate electrical model of a chip scale BGA. Program operation consists of entering the available data, and retrieving output that can be used in a simulation, or simply analyzed for an idea as to the range of values the parasitic effects take. The whole process will just take minutes. The program was designed to be fast and portable contrasting other methods of modeling in which such attributes were sacrificed for greater accuracy. Such accuracy may not be desired in most applications where there is a greater emphasis on speed or where powerful workstations are not available. The models targeted for both data processing and RF systems will have a wide range of use across military and commercial electronics applications.
doi_str_mv 10.1109/ECTC.1998.678906
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fullrecord <record><control><sourceid>proquest_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_678906</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>678906</ieee_id><sourcerecordid>27585084</sourcerecordid><originalsourceid>FETCH-LOGICAL-i203t-9445ea09e88ba7e7c2beeee1cab7d0b551b2c67c71af336a1c316672893acca23</originalsourceid><addsrcrecordid>eNotUDtrwzAYFH1AQ-q9dNJU6GBXD-s1psZNC4Eu6Wxk5XOjIseu5Qz99xU4x8ENd9zBIfRASUEpMS91ta8KaowupNKGyCu0YlypXCgmr1FmlCaJvBRM8hu0IkKaXAjC71AW4w9JKIWgXK_Qcx3AzZN3NuB-OEDwp288dHg-AnZHP-KYHMCv2809uu1siJBddI2-3up99Z7vPrcf1WaXe0b4nJuyFGCJAa1bq0A51kICdbZVB9Km2ZY5qZyituNcWuo4lVIxbbh1zjK-Rk9L7zgNv2eIc9P76CAEe4LhHBumhBZElyn4uAR96m_Gyfd2-muWQ_g_HFVQHg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype><pqid>27585084</pqid></control><display><type>conference_proceeding</type><title>Electrical modeling of the chip scale BGA</title><source>IEEE Xplore All Conference Series</source><creator>Caggiano, M.F. ; Brush, R.M. ; Kleban, J.T. ; Chuaypradit, P.J.</creator><creatorcontrib>Caggiano, M.F. ; Brush, R.M. ; Kleban, J.T. ; Chuaypradit, P.J.</creatorcontrib><description>The CSBGA package-modeling program can rapidly generate a model from a specific description of a package or from partial information when only a rough approximation is needed. This innovative new software is targeted for the engineer who, at his desktop PC or workstation, can rapidly generate an accurate electrical model of a chip scale BGA. Program operation consists of entering the available data, and retrieving output that can be used in a simulation, or simply analyzed for an idea as to the range of values the parasitic effects take. The whole process will just take minutes. The program was designed to be fast and portable contrasting other methods of modeling in which such attributes were sacrificed for greater accuracy. Such accuracy may not be desired in most applications where there is a greater emphasis on speed or where powerful workstations are not available. The models targeted for both data processing and RF systems will have a wide range of use across military and commercial electronics applications.</description><identifier>ISSN: 0569-5503</identifier><identifier>ISBN: 9780780345263</identifier><identifier>ISBN: 0780345266</identifier><identifier>EISSN: 2377-5726</identifier><identifier>DOI: 10.1109/ECTC.1998.678906</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analytical models ; Brushes ; Capacitance ; Data processing ; Electronics packaging ; Inductance ; Information retrieval ; Power system modeling ; Radio frequency ; Workstations</subject><ispartof>1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206), 1998, p.1280-1285</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/678906$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,780,784,789,790,2058,4050,4051,27924,27925,54555,54920,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/678906$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Caggiano, M.F.</creatorcontrib><creatorcontrib>Brush, R.M.</creatorcontrib><creatorcontrib>Kleban, J.T.</creatorcontrib><creatorcontrib>Chuaypradit, P.J.</creatorcontrib><title>Electrical modeling of the chip scale BGA</title><title>1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)</title><addtitle>ECTC</addtitle><description>The CSBGA package-modeling program can rapidly generate a model from a specific description of a package or from partial information when only a rough approximation is needed. This innovative new software is targeted for the engineer who, at his desktop PC or workstation, can rapidly generate an accurate electrical model of a chip scale BGA. Program operation consists of entering the available data, and retrieving output that can be used in a simulation, or simply analyzed for an idea as to the range of values the parasitic effects take. The whole process will just take minutes. The program was designed to be fast and portable contrasting other methods of modeling in which such attributes were sacrificed for greater accuracy. Such accuracy may not be desired in most applications where there is a greater emphasis on speed or where powerful workstations are not available. The models targeted for both data processing and RF systems will have a wide range of use across military and commercial electronics applications.</description><subject>Analytical models</subject><subject>Brushes</subject><subject>Capacitance</subject><subject>Data processing</subject><subject>Electronics packaging</subject><subject>Inductance</subject><subject>Information retrieval</subject><subject>Power system modeling</subject><subject>Radio frequency</subject><subject>Workstations</subject><issn>0569-5503</issn><issn>2377-5726</issn><isbn>9780780345263</isbn><isbn>0780345266</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1998</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotUDtrwzAYFH1AQ-q9dNJU6GBXD-s1psZNC4Eu6Wxk5XOjIseu5Qz99xU4x8ENd9zBIfRASUEpMS91ta8KaowupNKGyCu0YlypXCgmr1FmlCaJvBRM8hu0IkKaXAjC71AW4w9JKIWgXK_Qcx3AzZN3NuB-OEDwp288dHg-AnZHP-KYHMCv2809uu1siJBddI2-3up99Z7vPrcf1WaXe0b4nJuyFGCJAa1bq0A51kICdbZVB9Km2ZY5qZyituNcWuo4lVIxbbh1zjK-Rk9L7zgNv2eIc9P76CAEe4LhHBumhBZElyn4uAR96m_Gyfd2-muWQ_g_HFVQHg</recordid><startdate>1998</startdate><enddate>1998</enddate><creator>Caggiano, M.F.</creator><creator>Brush, R.M.</creator><creator>Kleban, J.T.</creator><creator>Chuaypradit, P.J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>1998</creationdate><title>Electrical modeling of the chip scale BGA</title><author>Caggiano, M.F. ; Brush, R.M. ; Kleban, J.T. ; Chuaypradit, P.J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i203t-9445ea09e88ba7e7c2beeee1cab7d0b551b2c67c71af336a1c316672893acca23</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Analytical models</topic><topic>Brushes</topic><topic>Capacitance</topic><topic>Data processing</topic><topic>Electronics packaging</topic><topic>Inductance</topic><topic>Information retrieval</topic><topic>Power system modeling</topic><topic>Radio frequency</topic><topic>Workstations</topic><toplevel>online_resources</toplevel><creatorcontrib>Caggiano, M.F.</creatorcontrib><creatorcontrib>Brush, R.M.</creatorcontrib><creatorcontrib>Kleban, J.T.</creatorcontrib><creatorcontrib>Chuaypradit, P.J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Caggiano, M.F.</au><au>Brush, R.M.</au><au>Kleban, J.T.</au><au>Chuaypradit, P.J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Electrical modeling of the chip scale BGA</atitle><btitle>1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)</btitle><stitle>ECTC</stitle><date>1998</date><risdate>1998</risdate><spage>1280</spage><epage>1285</epage><pages>1280-1285</pages><issn>0569-5503</issn><eissn>2377-5726</eissn><isbn>9780780345263</isbn><isbn>0780345266</isbn><abstract>The CSBGA package-modeling program can rapidly generate a model from a specific description of a package or from partial information when only a rough approximation is needed. This innovative new software is targeted for the engineer who, at his desktop PC or workstation, can rapidly generate an accurate electrical model of a chip scale BGA. Program operation consists of entering the available data, and retrieving output that can be used in a simulation, or simply analyzed for an idea as to the range of values the parasitic effects take. The whole process will just take minutes. The program was designed to be fast and portable contrasting other methods of modeling in which such attributes were sacrificed for greater accuracy. Such accuracy may not be desired in most applications where there is a greater emphasis on speed or where powerful workstations are not available. The models targeted for both data processing and RF systems will have a wide range of use across military and commercial electronics applications.</abstract><pub>IEEE</pub><doi>10.1109/ECTC.1998.678906</doi><tpages>6</tpages></addata></record>
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identifier ISSN: 0569-5503
ispartof 1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206), 1998, p.1280-1285
issn 0569-5503
2377-5726
language eng
recordid cdi_ieee_primary_678906
source IEEE Xplore All Conference Series
subjects Analytical models
Brushes
Capacitance
Data processing
Electronics packaging
Inductance
Information retrieval
Power system modeling
Radio frequency
Workstations
title Electrical modeling of the chip scale BGA
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T04%3A45%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Electrical%20modeling%20of%20the%20chip%20scale%20BGA&rft.btitle=1998%20Proceedings.%2048th%20Electronic%20Components%20and%20Technology%20Conference%20(Cat.%20No.98CH36206)&rft.au=Caggiano,%20M.F.&rft.date=1998&rft.spage=1280&rft.epage=1285&rft.pages=1280-1285&rft.issn=0569-5503&rft.eissn=2377-5726&rft.isbn=9780780345263&rft.isbn_list=0780345266&rft_id=info:doi/10.1109/ECTC.1998.678906&rft_dat=%3Cproquest_CHZPO%3E27585084%3C/proquest_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i203t-9445ea09e88ba7e7c2beeee1cab7d0b551b2c67c71af336a1c316672893acca23%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=27585084&rft_id=info:pmid/&rft_ieee_id=678906&rfr_iscdi=true