Analog/RF Solutions Enabling Compact Full-Duplex Radios

In-band full-duplex sets challenging requirements for wireless communication radios, in particular their capability to prevent receiver sensitivity degradation due to self-interference (transmit signals leaking into its own receiver). Previously published self-interference rejection designs require...

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Bibliographic Details
Published in:IEEE journal on selected areas in communications 2014-09, Vol.32 (9), p.1662-1673
Main Authors: Debaillie, Bjorn, van den Broek, Dirk-Jan, Lavin, Cristina, van Liempd, Barend, Klumperink, Eric A. M., Palacios, Carmen, Craninckx, Jan, Nauta, Bram, Parssinen, Aarno
Format: Article
Language:English
Subjects:
Antennas
Noise
Radio frequency
Radio transmitters
Receivers
Receivers & amplifiers
Transceivers
Wireless communication
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Summary:In-band full-duplex sets challenging requirements for wireless communication radios, in particular their capability to prevent receiver sensitivity degradation due to self-interference (transmit signals leaking into its own receiver). Previously published self-interference rejection designs require bulky components and/or antenna structures. This paper addresses this form-factor issue. First, compact radio transceiver feasibility bottlenecks are identified analytically, and tradeoff equations in function of link budget parameters are presented. These derivations indicate that the main bottlenecks can be resolved by increasing the isolation in analog/RF. Therefore, two design ideas are proposed, which provide attractive analog/RF-isolation and allow integration in compact radios. The first design proposal targets compact radio devices, such as small-cell base stations and tablet computers, and combines a dual-port polarized antenna with a self-tunable cancellation circuit. The second design proposal targets even more compact radio devices such as smartphones and sensor network nodes. This design builds on a tunable electrical balance isolator/duplexer in combination with a single-port miniature antenna. The electrical balance circuit can be implemented for scaled CMOS technology, facilitating low cost and dense integration.
ISSN:0733-8716
1558-0008
DOI:10.1109/JSAC.2014.2330171