A 240GHz wideband QPSK receiver in 65nm CMOS

This paper demonstrates a 240GHz wideband QPSK receiver in 65nm bulk CMOS. A direct-conversion mixer-first architecture is implemented with a 240GHz on-chip antenna. Wideband passive mixers at the front end employ a 240GHz LO and convert the received signal down to baseband. The baseband signal is t...

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Bibliographic Details
Main Authors: Thyagarajan, Siva V., Shinwon Kang, Niknejad, Ali M.
Format: Conference Proceeding
Language:English
Subjects:
240GHz
Bandwidth
Baseband
baseband amplifier
communication
delayed transmission line
direct conversion
Gain
mixer-first architecture
Mixers
Noise figure
on-chip slotted loop antenna
Phase shift keying
QPSK
receiver
Receivers
sub-terahertz
wideband
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Description
Summary:This paper demonstrates a 240GHz wideband QPSK receiver in 65nm bulk CMOS. A direct-conversion mixer-first architecture is implemented with a 240GHz on-chip antenna. Wideband passive mixers at the front end employ a 240GHz LO and convert the received signal down to baseband. The baseband signal is then amplified using high gain, wide bandwidth amplifiers. The 240GHz LO chain consists of 27GHz/80GHz injection-locked oscillators, 80GHz amplifiers and a frequency tripler. The overall receiver gain is 25dB and the noise figure is 15dB from measurements. This receiver design achieves a data rate of 16Gbps with a power consumption of 260mW.
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2014.6851741