A monolithically-integrated chip-to-chip optical link in bulk CMOS

A silicon-photonic link is monolithically-integrated in a bulk CMOS process for the first time. Deep-trench isolation enables polySi waveguide integration. PolySi resonant detectors remove the need for Ge integration. Split-diode design enables half-rate receivers, mitigating transistor speed limita...

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Bibliographic Details
Main Authors: Sun, C., Georgas, M., Orcutt, J. S., Moss, B. R., Chen, Y.-H, Shainline, J., Wade, M., Mehta, K., Nammari, K., Timurdogan, E., Miller, D., Tehar-Zahav, O., Sternberg, Z., Leu, J. C., Chong, J., Bafrali, R., Sandhu, G., Watts, M., Meade, R., Popovic, M. A., Ram, R. J., Stojanovic, V.
Format: Conference Proceeding
Language:English
Subjects:
bulk
DRAM
Monolithic
optical
Optical fiber communication
Optical fibers
Optical receivers
Photonics
transceiver
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Summary:A silicon-photonic link is monolithically-integrated in a bulk CMOS process for the first time. Deep-trench isolation enables polySi waveguide integration. PolySi resonant detectors remove the need for Ge integration. Split-diode design enables half-rate receivers, mitigating transistor speed limitations. An on-chip feedback loop locks the resonant defect detector to the laser wavelength, combating thermal upset. The 5 m optical link achieves 5 Gb/s at 3 pJ/b electrical and 13 pJ/b optical energy, in 0.18 μm (100 ps FO4) bulk CMOS memory periphery process.
ISSN:2158-5601
2158-5636
DOI:10.1109/VLSIC.2014.6858377