Routability-Driven Blockage-Aware Macro Placement

We present a new floorplan representation, called circular-packing trees (CP-trees), for the problem of macro placement. Our CP-trees can flexibly pack movable macros toward corners or pre-placed macros along chip boundaries circularly to optimize macro positions/orientations for better wirelength a...

Full description

Saved in:
Bibliographic Details
Main Authors: Chen, Yi-Fang, Huang, Chau-Chin, Chiou, Chien-Hsiung, Chang, Yao-Wen, Wang, Chang-Jen
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Hardware > Electronic design automation > Physical design (EDA)
Metals
Physical Design
Placement
Robustness
Routability
Routing
Switches
System-on-chip
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We present a new floorplan representation, called circular-packing trees (CP-trees), for the problem of macro placement. Our CP-trees can flexibly pack movable macros toward corners or pre-placed macros along chip boundaries circularly to optimize macro positions/orientations for better wirelength and routing congestion. Unlike previous macro placers that often consider only the interconnections among macros, we develop a routability-aware wirelength model to fast estimate the wirelength among macros and standard cells and to consider macro porosity effects for better routability. Compared with leading academic mixed-size placers, experimental results show that our algorithm can achieve the shortest routed wirelength for industrial benchmarks.
ISSN:0738-100X
DOI:10.1145/2593069.2593206