Loading…

A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers

A digital built-in calibration (BIC) system is presented to automatically adjust the linearity performance of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digit...

Full description

Saved in:
Bibliographic Details
Main Authors: Yongsuk Choi, Chun-hsiang Chang, Chauhan, Hari, In-Seok Jung, Onabajo, Marvin, Yong-Bin Kim
Format: Conference Proceeding
Language:English
Subjects:
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 602
container_issue
container_start_page 599
container_title
container_volume
creator Yongsuk Choi
Chun-hsiang Chang
Chauhan, Hari
In-Seok Jung
Onabajo, Marvin
Yong-Bin Kim
description A digital built-in calibration (BIC) system is presented to automatically adjust the linearity performance of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digital signal processing at low rates. The output of the envelope detector is digitized before the spectrum calculation with an integrated fast Fourier transform (FFT) for estimation of the third-order intermodulation (IM3) distortion specification of the LNA. The digitally-assisted closed-loop calibration scheme is demonstrated with simulations using a two-tone test with 1MHz tone spacing, a 512-point FFT engine, a 10-bit analog-to-digital converter model, and digital blocks operating with a 51.2MHz clock frequency. The total calibration time is 485μs. The digital blocks were implemented using a standard 0.13μm CMOS technology.
doi_str_mv 10.1109/MWSCAS.2014.6908486
format conference_proceeding
fullrecord <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_6908486</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6908486</ieee_id><sourcerecordid>6908486</sourcerecordid><originalsourceid>FETCH-LOGICAL-i208t-4996abdd79ab0ac160e350d58b9678b9feae551d25f486c598a68eee6c3f41de3</originalsourceid><addsrcrecordid>eNo1kF1LwzAYheMXuM39gt3kD7QmzUeTyzKcChPBKV6OtHmDkbYpaXYxf72VzZtz4DyHF96D0IqSnFKi718-d-tqlxeE8lxqoriSF2hOeak1p6xQl2hGhVAZU1pfoaUu1T_j8vqP8YmVXN6i-Th-E1KwkuoZqitcH3ybMt_jxrS-jib50OPxOCbocAo4DMl3_gdw-vLRZiFaiNj3CWIX7KE91QeILsTO9A3g4PDbBptuaL3zEMc7dONMO8Ly7Av0sXl4Xz9l29fH53W1zXxBVMq41tLU1pba1MQ0VBJgglihai3LSRwYEILaQrjp90ZoZaQCANkwx6kFtkCr010_pfsh-s7E4_68FfsF2D1cRg</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers</title><source>IEEE Xplore All Conference Series</source><creator>Yongsuk Choi ; Chun-hsiang Chang ; Chauhan, Hari ; In-Seok Jung ; Onabajo, Marvin ; Yong-Bin Kim</creator><creatorcontrib>Yongsuk Choi ; Chun-hsiang Chang ; Chauhan, Hari ; In-Seok Jung ; Onabajo, Marvin ; Yong-Bin Kim</creatorcontrib><description>A digital built-in calibration (BIC) system is presented to automatically adjust the linearity performance of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digital signal processing at low rates. The output of the envelope detector is digitized before the spectrum calculation with an integrated fast Fourier transform (FFT) for estimation of the third-order intermodulation (IM3) distortion specification of the LNA. The digitally-assisted closed-loop calibration scheme is demonstrated with simulations using a two-tone test with 1MHz tone spacing, a 512-point FFT engine, a 10-bit analog-to-digital converter model, and digital blocks operating with a 51.2MHz clock frequency. The total calibration time is 485μs. The digital blocks were implemented using a standard 0.13μm CMOS technology.</description><identifier>ISSN: 1548-3746</identifier><identifier>ISBN: 9781479941346</identifier><identifier>ISBN: 1479941344</identifier><identifier>EISSN: 1558-3899</identifier><identifier>EISBN: 1479941328</identifier><identifier>EISBN: 9781479941322</identifier><identifier>DOI: 10.1109/MWSCAS.2014.6908486</identifier><language>eng</language><publisher>IEEE</publisher><subject>analog/RF testing ; built-in calibration (BIC) ; Calibration ; Capacitors ; Engines ; envelope detection ; Envelope detectors ; fast Fourier transform (FFT) ; Linearity ; linearization ; Low-noise amplifier (LNA) ; Radio frequency ; spectral analysis ; System-on-chip</subject><ispartof>2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 2014, p.599-602</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6908486$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6908486$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yongsuk Choi</creatorcontrib><creatorcontrib>Chun-hsiang Chang</creatorcontrib><creatorcontrib>Chauhan, Hari</creatorcontrib><creatorcontrib>In-Seok Jung</creatorcontrib><creatorcontrib>Onabajo, Marvin</creatorcontrib><creatorcontrib>Yong-Bin Kim</creatorcontrib><title>A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers</title><title>2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)</title><addtitle>MWSCAS</addtitle><description>A digital built-in calibration (BIC) system is presented to automatically adjust the linearity performance of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digital signal processing at low rates. The output of the envelope detector is digitized before the spectrum calculation with an integrated fast Fourier transform (FFT) for estimation of the third-order intermodulation (IM3) distortion specification of the LNA. The digitally-assisted closed-loop calibration scheme is demonstrated with simulations using a two-tone test with 1MHz tone spacing, a 512-point FFT engine, a 10-bit analog-to-digital converter model, and digital blocks operating with a 51.2MHz clock frequency. The total calibration time is 485μs. The digital blocks were implemented using a standard 0.13μm CMOS technology.</description><subject>analog/RF testing</subject><subject>built-in calibration (BIC)</subject><subject>Calibration</subject><subject>Capacitors</subject><subject>Engines</subject><subject>envelope detection</subject><subject>Envelope detectors</subject><subject>fast Fourier transform (FFT)</subject><subject>Linearity</subject><subject>linearization</subject><subject>Low-noise amplifier (LNA)</subject><subject>Radio frequency</subject><subject>spectral analysis</subject><subject>System-on-chip</subject><issn>1548-3746</issn><issn>1558-3899</issn><isbn>9781479941346</isbn><isbn>1479941344</isbn><isbn>1479941328</isbn><isbn>9781479941322</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2014</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1kF1LwzAYheMXuM39gt3kD7QmzUeTyzKcChPBKV6OtHmDkbYpaXYxf72VzZtz4DyHF96D0IqSnFKi718-d-tqlxeE8lxqoriSF2hOeak1p6xQl2hGhVAZU1pfoaUu1T_j8vqP8YmVXN6i-Th-E1KwkuoZqitcH3ybMt_jxrS-jib50OPxOCbocAo4DMl3_gdw-vLRZiFaiNj3CWIX7KE91QeILsTO9A3g4PDbBptuaL3zEMc7dONMO8Ly7Av0sXl4Xz9l29fH53W1zXxBVMq41tLU1pba1MQ0VBJgglihai3LSRwYEILaQrjp90ZoZaQCANkwx6kFtkCr010_pfsh-s7E4_68FfsF2D1cRg</recordid><startdate>20140801</startdate><enddate>20140801</enddate><creator>Yongsuk Choi</creator><creator>Chun-hsiang Chang</creator><creator>Chauhan, Hari</creator><creator>In-Seok Jung</creator><creator>Onabajo, Marvin</creator><creator>Yong-Bin Kim</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>20140801</creationdate><title>A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers</title><author>Yongsuk Choi ; Chun-hsiang Chang ; Chauhan, Hari ; In-Seok Jung ; Onabajo, Marvin ; Yong-Bin Kim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i208t-4996abdd79ab0ac160e350d58b9678b9feae551d25f486c598a68eee6c3f41de3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2014</creationdate><topic>analog/RF testing</topic><topic>built-in calibration (BIC)</topic><topic>Calibration</topic><topic>Capacitors</topic><topic>Engines</topic><topic>envelope detection</topic><topic>Envelope detectors</topic><topic>fast Fourier transform (FFT)</topic><topic>Linearity</topic><topic>linearization</topic><topic>Low-noise amplifier (LNA)</topic><topic>Radio frequency</topic><topic>spectral analysis</topic><topic>System-on-chip</topic><toplevel>online_resources</toplevel><creatorcontrib>Yongsuk Choi</creatorcontrib><creatorcontrib>Chun-hsiang Chang</creatorcontrib><creatorcontrib>Chauhan, Hari</creatorcontrib><creatorcontrib>In-Seok Jung</creatorcontrib><creatorcontrib>Onabajo, Marvin</creatorcontrib><creatorcontrib>Yong-Bin Kim</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yongsuk Choi</au><au>Chun-hsiang Chang</au><au>Chauhan, Hari</au><au>In-Seok Jung</au><au>Onabajo, Marvin</au><au>Yong-Bin Kim</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers</atitle><btitle>2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)</btitle><stitle>MWSCAS</stitle><date>2014-08-01</date><risdate>2014</risdate><spage>599</spage><epage>602</epage><pages>599-602</pages><issn>1548-3746</issn><eissn>1558-3899</eissn><isbn>9781479941346</isbn><isbn>1479941344</isbn><eisbn>1479941328</eisbn><eisbn>9781479941322</eisbn><abstract>A digital built-in calibration (BIC) system is presented to automatically adjust the linearity performance of a tunable RF low-noise amplifier (LNA) operating at 2.4GHz. An envelope detection circuit is used to extract the linearity characteristics at low frequencies, enabling the sampling and digital signal processing at low rates. The output of the envelope detector is digitized before the spectrum calculation with an integrated fast Fourier transform (FFT) for estimation of the third-order intermodulation (IM3) distortion specification of the LNA. The digitally-assisted closed-loop calibration scheme is demonstrated with simulations using a two-tone test with 1MHz tone spacing, a 512-point FFT engine, a 10-bit analog-to-digital converter model, and digital blocks operating with a 51.2MHz clock frequency. The total calibration time is 485μs. The digital blocks were implemented using a standard 0.13μm CMOS technology.</abstract><pub>IEEE</pub><doi>10.1109/MWSCAS.2014.6908486</doi><tpages>4</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 1548-3746
ispartof 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 2014, p.599-602
issn 1548-3746
1558-3899
language eng
recordid cdi_ieee_primary_6908486
source IEEE Xplore All Conference Series
subjects analog/RF testing
built-in calibration (BIC)
Calibration
Capacitors
Engines
envelope detection
Envelope detectors
fast Fourier transform (FFT)
Linearity
linearization
Low-noise amplifier (LNA)
Radio frequency
spectral analysis
System-on-chip
title A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T15%3A17%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20built-in%20calibration%20system%20to%20optimize%20third-order%20intermodulation%20performance%20of%20RF%20amplifiers&rft.btitle=2014%20IEEE%2057th%20International%20Midwest%20Symposium%20on%20Circuits%20and%20Systems%20(MWSCAS)&rft.au=Yongsuk%20Choi&rft.date=2014-08-01&rft.spage=599&rft.epage=602&rft.pages=599-602&rft.issn=1548-3746&rft.eissn=1558-3899&rft.isbn=9781479941346&rft.isbn_list=1479941344&rft_id=info:doi/10.1109/MWSCAS.2014.6908486&rft.eisbn=1479941328&rft.eisbn_list=9781479941322&rft_dat=%3Cieee_CHZPO%3E6908486%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i208t-4996abdd79ab0ac160e350d58b9678b9feae551d25f486c598a68eee6c3f41de3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6908486&rfr_iscdi=true