Low-Complexity Tree Architecture for Finding the First Two Minima

This brief presents an area-efficient tree architecture for finding the first two minima as well as the index of the first minimum, which is essential in the design of a low-density parity-check decoder based on the min-sum algorithm. The proposed architecture reduces the number of comparators by re...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2015-01, Vol.62 (1), p.61-64
Main Authors: Lee, Youngjoo, Kim, Bongjin, Jung, Jaehwan, Park, In-Cheol
Format: Article
Language:English
Subjects:
Algorithms
Architecture
Architecture (computers)
Area-efficient design
Circuits
Comparators
Complexity theory
Computer architecture
Decoding
Delays
Design engineering
Digital integrated circuits
Hardware
LDPC codes
Minima
Minimum value generation
Multiplexing
Parity check codes
Tree structure
Trees
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Summary:This brief presents an area-efficient tree architecture for finding the first two minima as well as the index of the first minimum, which is essential in the design of a low-density parity-check decoder based on the min-sum algorithm. The proposed architecture reduces the number of comparators by reusing the intermediate comparison results computed for the first minimum in order to collect the candidates of the second minimum. As a result, the proposed tree architecture improves the area-time complexity remarkably.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2014.2362663