A 60GHz transmitter in 40nm CMOS achieving mm-precision for discrete-carrier localization

• Main Authors: Indirayanti, Paramartha, Ayhan, Tuba, Verhelst, Marian, Dehaene, Wim, Reynaert, Patrick
• Format: Conference Proceeding
• Language: English
• Subjects: Bandwidth; CMOS integrated circuits; Distance measurement; Frequency conversion; OFDM; Receivers; Transmitters
• ISSN: 1930-8833; 2643-1319
• DOI: 10.1109/ESSCIRC.2014.6942079

This paper presents an efficient multicarrier 60GHz transmitter for distance measurement (ranging) in an indoor wireless localization system. By exploiting hardware-algorithm co-design, a high precision, high update rate, yet power efficient transmitter architecture is achieved, which comprises subcarrier generation through frequency division, an upconverter, and a power amplifier. An efficient frequency generation through digital design is ensured by means of co-design with the amplitude nonlinearity-tolerant algorithm. In consequence, conventional power hungry baseband blocks, such as DAC and OFDM processor, are avoided. Moreover, symbol selection is performed to minimize PAPR. The transmitter achieves 0.7-2.4mm precision demonstrated over a distance of 4m. During operation, the core digital subcarrier generator generates 16 non-equidistant subcarriers, while consuming an average power of 1.8mW out of 0.9V supply with an input clock of 3GHz. The upconverter and the power amplifier altogether consume around 127mW. The total active area of the core transmitter circuit is 0.9mm 2 . The chip is fabricated in a 40nm general purpose CMOS process.