A New High-Density Twin-Gate Isolation One-Time Programmable Memory Cell in Pure 28-nm CMOS Logic Process

A new and compact high-k dielectric breakdown one-time programmable (OTP) cell in pure 28-nm high-k metal gate (HKMG) process is proposed. By adopting a self-aligned twin-gate isolation (TGI) made by merged gate spacer, the new OTP cell can operate independently with a very small cell area. Fabricat...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2015-01, Vol.62 (1), p.121-127
Main Authors: Hsiao, Woan Yun, Peng, Ping Chun, Chang, Tzong-Sheng, Chih, Yu-Der, Tsai, Wu-Chin, Chang, Meng-Fan, Chien, Tun-Fei, King, Ya-Chin, Lin, Chrong-Jung
Format: Article
Language:English
Subjects:
Antifuse
Arrays
CMOS integrated circuits
Dielectric breakdown
Dielectrics
high-k dielectric breakdown
Implants
Logic gates
logic nonvolatile memory (NVM)
Metals
one-time programmable (OTP) memory
Semiconductors
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Summary:A new and compact high-k dielectric breakdown one-time programmable (OTP) cell in pure 28-nm high-k metal gate (HKMG) process is proposed. By adopting a self-aligned twin-gate isolation (TGI) made by merged gate spacer, the new OTP cell can operate independently with a very small cell area. Fabricated by a pure 28-nm HKMG CMOS logic process, this OTP cell successfully achieves an ultrasmall cell size of 0.0441 μm 2 on 28-nm HKMG CMOS logic platform. Using high-k dielectric breakdown as its program mechanism, the antifuse TGI OTP memory has more than three orders of ON/OFF read window with a low program voltage of 4 V in 20 μs. Furthermore, a highly density 64-kbit TGI OTP array has been fabricated and successfully demonstrates the new superior isolation and reliability performances.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2014.2371617