A broadband low voltage CMOS low noise amplifier design

A 3.5-9.5GHz LNA employs a folded-cascode structure to reduce the supply voltage is presented in this letter. The input matching network is adopted to resonate over the entire frequency band. The circuit performance achieves a maximum forward gain S21 of 11.8dB from a 0.65V supply voltage.

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Main Authors: Chih-Lung Hsiao, Hung-Che Wei, Yue-Fang Kuo
Format: Conference Proceeding
Language:English
Subjects:
Band-pass filters
Capacitors
CMOS
CMOS integrated circuits
Impedance matching
Inductors
LNA
Low vlotage
Low-noise amplifiers
Noise figure
UWB
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creator Chih-Lung Hsiao
Hung-Che Wei
Yue-Fang Kuo
description A 3.5-9.5GHz LNA employs a folded-cascode structure to reduce the supply voltage is presented in this letter. The input matching network is adopted to resonate over the entire frequency band. The circuit performance achieves a maximum forward gain S21 of 11.8dB from a 0.65V supply voltage.
doi_str_mv 10.1109/GCCE.2014.7031166
format conference_proceeding
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Band-pass filters
Capacitors
CMOS
CMOS integrated circuits
Impedance matching
Inductors
LNA
Low vlotage
Low-noise amplifiers
Noise figure
UWB
title A broadband low voltage CMOS low noise amplifier design
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