Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems

• Published in: IEEE transactions on very large scale integration (VLSI) systems 2016-01, Vol.24 (1), p.334-337
• Main Authors: Liang Shi, Yejia Di, Mengying Zhao, Xue, Chun Jason, Wu, Kaijie, Sha, Edwin H.-M
• Format: Article
• Language: English
• Subjects: Ash; Blocking; Data storage; Educational institutions; Flash memories; Flash memory (computers); Hotness ranks; Performance enhancement; Process Variation (PV); Resource management; Runtime; Simulation; speed groups; State of the art; Strength; Time factors; Very large scale integration; write performance
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2015.2393299

The write performance of flash memory has been degraded significantly due to the recent density-oriented advancements of flash technology. Techniques have been proposed to improve the write performance by exploiting the varying strength of a flash block in its different worn-out stages. A block is written with a faster speed when it is new and strong, and gradually will be written with slower speeds as it is aging and becomes weak. Motivated by these works, this brief proposes a new technique by exploiting the significant process variation among flash blocks introduced by the advanced technology scaling. First, a write speed detection approach is proposed to identify the strength of each block. Then, a heuristic approach is proposed to exploit the speed variation among blocks for write performance improvement. A series of trace-driven simulations shows that the proposed approach generates substantial write performance improvement over state-of-the-art approaches by 30% on average.