A new surface potential-based compact model for a-IGZO TFTs in RFID applications

For the first time, we present a surface potential-based compact model for a-IGZO TFTs based on multiple trapping-release theory and benchmark our work against device measurements. This model does not require time-consuming calculation. Meanwhile, we have developed the automatic parameter extraction...

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Bibliographic Details
Main Authors: Zhiwei Zong, Ling Li, Jin Jang, Zhigang Li, Nianduan Lu, Liwei Shang, Zhuoyu Ji, Ming Liu
Format: Conference Proceeding
Language:English
Subjects:
Data models
Integrated circuit modeling
Logic gates
Radiofrequency identification
Solid modeling
Thin film transistors
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Summary:For the first time, we present a surface potential-based compact model for a-IGZO TFTs based on multiple trapping-release theory and benchmark our work against device measurements. This model does not require time-consuming calculation. Meanwhile, we have developed the automatic parameter extraction program, which can extract the parameters rapidly and accurately. Moreover, the compact model is coded in Verilog-A, and implemented in a vendor CAD environment. This model provides physics-based consistent description of DC and AC device characteristics and enables accurate circuit-level performance prediction and RFID circuit design of a-IGZO TFTs.
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2014.7047176