Application-level embedded communication tracer for many-core systems

Design verification and debugging with both software and hardware is ever challenging for many-core systems. We present the embedded tracer architecture for application-level communication. Not only can the trace information be optimized, but also the verification can be performed at the system leve...

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Main Authors: Chih-Tsun Huang, Kuan-Chun Tasi, Jun-Shen Lin, Hsiao-Wei Chien
Format: Conference Proceeding
Language:English
Subjects:
Computer architecture
Debugging
Engines
Hardware
Protocols
Receivers
Software
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creator Chih-Tsun Huang
Kuan-Chun Tasi
Jun-Shen Lin
Hsiao-Wei Chien
description Design verification and debugging with both software and hardware is ever challenging for many-core systems. We present the embedded tracer architecture for application-level communication. Not only can the trace information be optimized, but also the verification can be performed at the system level efficiently. The unified architecture consolidates the debugging flow at different abstraction levels, and facilitates the performance analysis of the entire system as well. The use-case study and experiments have justified the effectiveness of the proposed tracer architecture.
doi_str_mv 10.1109/ASPDAC.2015.7059109
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subjects Computer architecture
Debugging
Engines
Hardware
Protocols
Receivers
Software
title Application-level embedded communication tracer for many-core systems
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