Loading…
13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network
In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image...
Saved in:
Main Authors: | , , , , , , , , , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | |
---|---|
cites | |
container_end_page | 3 |
container_issue | |
container_start_page | 1 |
container_title | |
container_volume | |
creator | Sano, Tomohiro Mizokami, Masakazu Matsui, Hiroaki Ueda, Keisuke Shibata, Kenichi Toyota, Kenji Saitou, Tatsuhito Sato, Hisayasu Yahagi, Koichi Hayashi, Yoshihiro |
description | In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented. |
doi_str_mv | 10.1109/ISSCC.2015.7063015 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>proquest_6IE</sourceid><recordid>TN_cdi_ieee_primary_7063015</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7063015</ieee_id><sourcerecordid>1770306994</sourcerecordid><originalsourceid>FETCH-LOGICAL-i534-5ce3c3c1757f11cf7fc251b17c91fb63995144e6e656ec1bd73443103111f8c3</originalsourceid><addsrcrecordid>eNpNkMtKA0EQRdsXGKM_oJteupmxa6of6WUMviAgGMHswqSnxnTMPOyeKK79cQeM4OpA3UPBvYydg0gBhL16mM0mkzQToFIjNPbcY2fWjEAaa3WWyWyfDTI0OhlpoQ_YyV-A-pANBFhMtEJxzE5iXAshlNWjAfsGTCUfc51i9cKvpze8C3kdHfkPCpyqJRUFFfxpzn2Vv1ISaE2u803NS7_peiWvC_4856s8VE3tXRK3bRsoxn9KoG309Stv6sStfMurvOvZH2rqPpvwdsqOynwT6WzHIZvd3jxP7pPp493DZDxNvEKZKEfo0IFRpgRwpSldpmAJxlkolxqtVSAladJKk4NlYVBKBIEAUI4cDtnl79c2NO9bit2i8n3PzSavqdnGBRgjUGhrZa9e_KqeiBZt6KuHr8VudfwB9VFxTg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype><pqid>1770306994</pqid></control><display><type>conference_proceeding</type><title>13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Sano, Tomohiro ; Mizokami, Masakazu ; Matsui, Hiroaki ; Ueda, Keisuke ; Shibata, Kenichi ; Toyota, Kenji ; Saitou, Tatsuhito ; Sato, Hisayasu ; Yahagi, Koichi ; Hayashi, Yoshihiro</creator><creatorcontrib>Sano, Tomohiro ; Mizokami, Masakazu ; Matsui, Hiroaki ; Ueda, Keisuke ; Shibata, Kenichi ; Toyota, Kenji ; Saitou, Tatsuhito ; Sato, Hisayasu ; Yahagi, Koichi ; Hayashi, Yoshihiro</creatorcontrib><description>In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented.</description><identifier>ISSN: 0193-6530</identifier><identifier>ISBN: 1479962236</identifier><identifier>ISBN: 9781479962235</identifier><identifier>EISSN: 2376-8606</identifier><identifier>EISBN: 9781479962242</identifier><identifier>EISBN: 1479962244</identifier><identifier>DOI: 10.1109/ISSCC.2015.7063015</identifier><language>eng</language><publisher>IEEE</publisher><subject>Architecture ; Calibration ; Consumption ; Devices ; Matched filters ; Matching ; Networks ; Phase locked loops ; Power harmonic filters ; Radio frequency ; Smartphones ; System-on-chip ; Transceivers</subject><ispartof>2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7063015$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,776,780,785,786,2052,27901,27902,54530,54895,54907</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7063015$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Sano, Tomohiro</creatorcontrib><creatorcontrib>Mizokami, Masakazu</creatorcontrib><creatorcontrib>Matsui, Hiroaki</creatorcontrib><creatorcontrib>Ueda, Keisuke</creatorcontrib><creatorcontrib>Shibata, Kenichi</creatorcontrib><creatorcontrib>Toyota, Kenji</creatorcontrib><creatorcontrib>Saitou, Tatsuhito</creatorcontrib><creatorcontrib>Sato, Hisayasu</creatorcontrib><creatorcontrib>Yahagi, Koichi</creatorcontrib><creatorcontrib>Hayashi, Yoshihiro</creatorcontrib><title>13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network</title><title>2015 IEEE International Solid State Circuits Conference (ISSCC)</title><addtitle>ISSCC</addtitle><description>In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented.</description><subject>Architecture</subject><subject>Calibration</subject><subject>Consumption</subject><subject>Devices</subject><subject>Matched filters</subject><subject>Matching</subject><subject>Networks</subject><subject>Phase locked loops</subject><subject>Power harmonic filters</subject><subject>Radio frequency</subject><subject>Smartphones</subject><subject>System-on-chip</subject><subject>Transceivers</subject><issn>0193-6530</issn><issn>2376-8606</issn><isbn>1479962236</isbn><isbn>9781479962235</isbn><isbn>9781479962242</isbn><isbn>1479962244</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2015</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpNkMtKA0EQRdsXGKM_oJteupmxa6of6WUMviAgGMHswqSnxnTMPOyeKK79cQeM4OpA3UPBvYydg0gBhL16mM0mkzQToFIjNPbcY2fWjEAaa3WWyWyfDTI0OhlpoQ_YyV-A-pANBFhMtEJxzE5iXAshlNWjAfsGTCUfc51i9cKvpze8C3kdHfkPCpyqJRUFFfxpzn2Vv1ISaE2u803NS7_peiWvC_4856s8VE3tXRK3bRsoxn9KoG309Stv6sStfMurvOvZH2rqPpvwdsqOynwT6WzHIZvd3jxP7pPp493DZDxNvEKZKEfo0IFRpgRwpSldpmAJxlkolxqtVSAladJKk4NlYVBKBIEAUI4cDtnl79c2NO9bit2i8n3PzSavqdnGBRgjUGhrZa9e_KqeiBZt6KuHr8VudfwB9VFxTg</recordid><startdate>201502</startdate><enddate>201502</enddate><creator>Sano, Tomohiro</creator><creator>Mizokami, Masakazu</creator><creator>Matsui, Hiroaki</creator><creator>Ueda, Keisuke</creator><creator>Shibata, Kenichi</creator><creator>Toyota, Kenji</creator><creator>Saitou, Tatsuhito</creator><creator>Sato, Hisayasu</creator><creator>Yahagi, Koichi</creator><creator>Hayashi, Yoshihiro</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>201502</creationdate><title>13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network</title><author>Sano, Tomohiro ; Mizokami, Masakazu ; Matsui, Hiroaki ; Ueda, Keisuke ; Shibata, Kenichi ; Toyota, Kenji ; Saitou, Tatsuhito ; Sato, Hisayasu ; Yahagi, Koichi ; Hayashi, Yoshihiro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i534-5ce3c3c1757f11cf7fc251b17c91fb63995144e6e656ec1bd73443103111f8c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Architecture</topic><topic>Calibration</topic><topic>Consumption</topic><topic>Devices</topic><topic>Matched filters</topic><topic>Matching</topic><topic>Networks</topic><topic>Phase locked loops</topic><topic>Power harmonic filters</topic><topic>Radio frequency</topic><topic>Smartphones</topic><topic>System-on-chip</topic><topic>Transceivers</topic><toplevel>online_resources</toplevel><creatorcontrib>Sano, Tomohiro</creatorcontrib><creatorcontrib>Mizokami, Masakazu</creatorcontrib><creatorcontrib>Matsui, Hiroaki</creatorcontrib><creatorcontrib>Ueda, Keisuke</creatorcontrib><creatorcontrib>Shibata, Kenichi</creatorcontrib><creatorcontrib>Toyota, Kenji</creatorcontrib><creatorcontrib>Saitou, Tatsuhito</creatorcontrib><creatorcontrib>Sato, Hisayasu</creatorcontrib><creatorcontrib>Yahagi, Koichi</creatorcontrib><creatorcontrib>Hayashi, Yoshihiro</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sano, Tomohiro</au><au>Mizokami, Masakazu</au><au>Matsui, Hiroaki</au><au>Ueda, Keisuke</au><au>Shibata, Kenichi</au><au>Toyota, Kenji</au><au>Saitou, Tatsuhito</au><au>Sato, Hisayasu</au><au>Yahagi, Koichi</au><au>Hayashi, Yoshihiro</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network</atitle><btitle>2015 IEEE International Solid State Circuits Conference (ISSCC)</btitle><stitle>ISSCC</stitle><date>2015-02</date><risdate>2015</risdate><spage>1</spage><epage>3</epage><pages>1-3</pages><issn>0193-6530</issn><eissn>2376-8606</eissn><isbn>1479962236</isbn><isbn>9781479962235</isbn><eisbn>9781479962242</eisbn><eisbn>1479962244</eisbn><abstract>In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.2015.7063015</doi><tpages>3</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0193-6530 |
ispartof | 2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3 |
issn | 0193-6530 2376-8606 |
language | eng |
recordid | cdi_ieee_primary_7063015 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Architecture Calibration Consumption Devices Matched filters Matching Networks Phase locked loops Power harmonic filters Radio frequency Smartphones System-on-chip Transceivers |
title | 13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-06T20%3A20%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=13.4%20A%206.3mW%20BLE%20transceiver%20embedded%20RX%20image-rejection%20filter%20and%20TX%20harmonic-suppression%20filter%20reusing%20on-chip%20matching%20network&rft.btitle=2015%20IEEE%20International%20Solid%20State%20Circuits%20Conference%20(ISSCC)&rft.au=Sano,%20Tomohiro&rft.date=2015-02&rft.spage=1&rft.epage=3&rft.pages=1-3&rft.issn=0193-6530&rft.eissn=2376-8606&rft.isbn=1479962236&rft.isbn_list=9781479962235&rft_id=info:doi/10.1109/ISSCC.2015.7063015&rft.eisbn=9781479962242&rft.eisbn_list=1479962244&rft_dat=%3Cproquest_6IE%3E1770306994%3C/proquest_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i534-5ce3c3c1757f11cf7fc251b17c91fb63995144e6e656ec1bd73443103111f8c3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=1770306994&rft_id=info:pmid/&rft_ieee_id=7063015&rfr_iscdi=true |