A compact 31-input programmable majority gate based on capacitive threshold logic

An improved, modular realization of the capacitive threshold logic (CTL) gates is presented which offers significant advantages in terms of silicon area and speed in certain applications. The general architecture and building blocks of the new modular CTL gates is introduced and the operation of the...

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Bibliographic Details
Main Authors: Leblebici, Y., Gurkaynak, F.K., Mlynek, D.
Format: Conference Proceeding
Language:English
Subjects:
Capacitors
Clocks
CMOS logic circuits
CMOS process
Inverters
Logic circuits
Logic design
Logic gates
Silicon
Threshold voltage
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Description
Summary:An improved, modular realization of the capacitive threshold logic (CTL) gates is presented which offers significant advantages in terms of silicon area and speed in certain applications. The general architecture and building blocks of the new modular CTL gates is introduced and the operation of the circuit is discussed. The main advantages of the CTL design concept include a very large fan-in capability, compact design, small logic depth and compatibility with conventional CMOS gates. These advantages are illustrated by the design of a 31-input majority gate. The CTL realization of the majority gate is almost three times faster than a full custom standard CMOS realization and occupies approximately one third of the area which results in a performance increase of nearly an order of magnitude.
DOI:10.1109/ISCAS.1998.706852