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A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications
Ring oscillator (RO)-based physical unclonable function (PUF) is resilient against noise impacts, but its response is susceptible to temperature variations. This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for...
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Published in: | IEEE transactions on computer-aided design of integrated circuits and systems 2015-07, Vol.34 (7), p.1143-1147 |
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creator | Yuan Cao Le Zhang Chip-Hong Chang Shoushun Chen |
description | Ring oscillator (RO)-based physical unclonable function (PUF) is resilient against noise impacts, but its response is susceptible to temperature variations. This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for lightweight applications. The negative temperature coefficient of the low-power subthreshold operation of current starved inverters is exploited to mitigate the variations of differential RO frequencies with temperature. The new architecture uses conspicuously simplified circuitries to generate and compare a large number of pairs of RO frequencies. The proposed nine-stage hybrid RO PUF was fabricated using global foundry 65-nm CMOS technology. The PUF occupies only 250 μm 2 of chip area and consumes only 32.3 μW per challenge response pair at 1.2 V and 230 MHz. The measured average and worst-case reliability of its responses are 99.84% and 97.28%, respectively, over a wide range of temperature from -40 to 120 °C. |
doi_str_mv | 10.1109/TCAD.2015.2424955 |
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This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for lightweight applications. The negative temperature coefficient of the low-power subthreshold operation of current starved inverters is exploited to mitigate the variations of differential RO frequencies with temperature. The new architecture uses conspicuously simplified circuitries to generate and compare a large number of pairs of RO frequencies. The proposed nine-stage hybrid RO PUF was fabricated using global foundry 65-nm CMOS technology. The PUF occupies only 250 μm 2 of chip area and consumes only 32.3 μW per challenge response pair at 1.2 V and 230 MHz. The measured average and worst-case reliability of its responses are 99.84% and 97.28%, respectively, over a wide range of temperature from -40 to 120 °C.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2015.2424955</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>IEEE</publisher><subject>hardware security ; Inverters ; Physical Unclonable Function ; process variation ; Radiation detectors ; ring oscillator ; Semiconductor device measurement ; Temperature measurement ; temperature stability ; Thermal stability ; Transistors</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2015-07, Vol.34 (7), p.1143-1147</ispartof><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c308t-f6e6ca90bb5f85f59f565cfc9ef1ba0fd67e433beb2dad9b03cc0e9082abe8303</citedby><cites>FETCH-LOGICAL-c308t-f6e6ca90bb5f85f59f565cfc9ef1ba0fd67e433beb2dad9b03cc0e9082abe8303</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7090974$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27924,27925,54796</link.rule.ids></links><search><creatorcontrib>Yuan Cao</creatorcontrib><creatorcontrib>Le Zhang</creatorcontrib><creatorcontrib>Chip-Hong Chang</creatorcontrib><creatorcontrib>Shoushun Chen</creatorcontrib><title>A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>Ring oscillator (RO)-based physical unclonable function (PUF) is resilient against noise impacts, but its response is susceptible to temperature variations. This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for lightweight applications. The negative temperature coefficient of the low-power subthreshold operation of current starved inverters is exploited to mitigate the variations of differential RO frequencies with temperature. The new architecture uses conspicuously simplified circuitries to generate and compare a large number of pairs of RO frequencies. The proposed nine-stage hybrid RO PUF was fabricated using global foundry 65-nm CMOS technology. The PUF occupies only 250 μm 2 of chip area and consumes only 32.3 μW per challenge response pair at 1.2 V and 230 MHz. The measured average and worst-case reliability of its responses are 99.84% and 97.28%, respectively, over a wide range of temperature from -40 to 120 °C.</description><subject>hardware security</subject><subject>Inverters</subject><subject>Physical Unclonable Function</subject><subject>process variation</subject><subject>Radiation detectors</subject><subject>ring oscillator</subject><subject>Semiconductor device measurement</subject><subject>Temperature measurement</subject><subject>temperature stability</subject><subject>Thermal stability</subject><subject>Transistors</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNo9kNFKwzAYhYMoOKcPIN7kBTr_JE3bXJbp3KCwoZteliT94yKtLWlx7O21bHhzzs35zsVHyD2DGWOgHrfz_GnGgckZj3mspLwgE6ZEGsVMsksyAZ5mEUAK1-Sm778AWCy5mpD3nBbtIdq0Bwx0eTTBV_R1TTe7Bf3ww56umi60P1jR7R5Do2v6Nmjjaz8cqWsDLfznfjjgmDTvutpbPfj2u78lV07XPd6de0p2i-ftfBkV65fVPC8iKyAbIpdgYrUCY6TLpJPKyURaZxU6ZjS4KkkxFsKg4ZWulAFhLaCCjGuDmQAxJez0a0Pb9wFd2QXf6HAsGZSjmHIUU45iyrOYP-bhxHhE_N-noEClsfgFNfBgRw</recordid><startdate>201507</startdate><enddate>201507</enddate><creator>Yuan Cao</creator><creator>Le Zhang</creator><creator>Chip-Hong Chang</creator><creator>Shoushun Chen</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201507</creationdate><title>A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications</title><author>Yuan Cao ; Le Zhang ; Chip-Hong Chang ; Shoushun Chen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c308t-f6e6ca90bb5f85f59f565cfc9ef1ba0fd67e433beb2dad9b03cc0e9082abe8303</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>hardware security</topic><topic>Inverters</topic><topic>Physical Unclonable Function</topic><topic>process variation</topic><topic>Radiation detectors</topic><topic>ring oscillator</topic><topic>Semiconductor device measurement</topic><topic>Temperature measurement</topic><topic>temperature stability</topic><topic>Thermal stability</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Yuan Cao</creatorcontrib><creatorcontrib>Le Zhang</creatorcontrib><creatorcontrib>Chip-Hong Chang</creatorcontrib><creatorcontrib>Shoushun Chen</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Xplore (Online service)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Yuan Cao</au><au>Le Zhang</au><au>Chip-Hong Chang</au><au>Shoushun Chen</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2015-07</date><risdate>2015</risdate><volume>34</volume><issue>7</issue><spage>1143</spage><epage>1147</epage><pages>1143-1147</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>Ring oscillator (RO)-based physical unclonable function (PUF) is resilient against noise impacts, but its response is susceptible to temperature variations. This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for lightweight applications. The negative temperature coefficient of the low-power subthreshold operation of current starved inverters is exploited to mitigate the variations of differential RO frequencies with temperature. The new architecture uses conspicuously simplified circuitries to generate and compare a large number of pairs of RO frequencies. The proposed nine-stage hybrid RO PUF was fabricated using global foundry 65-nm CMOS technology. The PUF occupies only 250 μm 2 of chip area and consumes only 32.3 μW per challenge response pair at 1.2 V and 230 MHz. The measured average and worst-case reliability of its responses are 99.84% and 97.28%, respectively, over a wide range of temperature from -40 to 120 °C.</abstract><pub>IEEE</pub><doi>10.1109/TCAD.2015.2424955</doi><tpages>5</tpages><oa>free_for_read</oa></addata></record> |
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subjects | hardware security Inverters Physical Unclonable Function process variation Radiation detectors ring oscillator Semiconductor device measurement Temperature measurement temperature stability Thermal stability Transistors |
title | A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications |
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