Hardware Trojan detection by delay and electromagnetic measurements

Hardware Trojans (HT) inserted in integrated circuits have received special attention of researchers. In this paper, we present firstly a novel HT detection technique based on path delays measurements. A delay model, which considers intra-die process variations, is established for a net. Secondly, w...

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Bibliographic Details
Main Authors: Ngo, X-T, Exurville, I., Bhasin, S., Danger, J-L, Guilley, S., Najm, Z., Rigaud, J-B, Robisson, B.
Format: Conference Proceeding
Language:English
Subjects:
Clocks
Delays
Field programmable gate arrays
Noise
Registers
Trojan horses
Online Access:Request full text
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Summary:Hardware Trojans (HT) inserted in integrated circuits have received special attention of researchers. In this paper, we present firstly a novel HT detection technique based on path delays measurements. A delay model, which considers intra-die process variations, is established for a net. Secondly, we show how to detect HT using ElectroMagnetic (EM) measurements. We study the HT detection probability according to its size taking into account the inter-die process variations with a set of FPGA. The results show, for instance, that there is a probability greater than 95% with a false negative rate of 5% to detect a HT larger than 1.7% of the original circuit.
ISSN:1530-1591
1558-1101
DOI:10.7873/DATE.2015.1103