Assessing intrinsic and extrinsic end-of-life risk using functional SRAM wafer level testing

Extended 6 Transistors (6T) SRAM (Static Random-Access Memory) characterization is used to measure degradation while separating intrinsic from extrinsic yield and accounting for yield assessment challenges such as voltage drop and measurement variability. Separation of extrinsic yield pre- and post-...

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Bibliographic Details
Main Authors: Randriamihaja, Y. Mamy, McMahon, W., Balasubramanian, S., Nigam, T., Parameshwaran, B., Mann, R., Klick, T., Schaefer, T., Kumar, A., Song, Y., Joshi, V., Ranjan, R., Chen, F.
Format: Conference Proceeding
Language:English
Subjects:
6T SRAM
Arrays
BTI
Current measurement
Degradation
Random access memory
reliability
Stress
TDDB
Temperature measurement
Voltage measurement
yield
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Summary:Extended 6 Transistors (6T) SRAM (Static Random-Access Memory) characterization is used to measure degradation while separating intrinsic from extrinsic yield and accounting for yield assessment challenges such as voltage drop and measurement variability. Separation of extrinsic yield pre- and post-stress reveals weak yield fixes and reduces HTOL (High Temperature Operating Life) failure risk.
ISSN:1541-7026
1938-1891
DOI:10.1109/IRPS.2015.7112759