Impact of DC and RF non-conducting stress on nMOS reliability

The increase of leakage current in deep-submicrometer MOS transistors operated below threshold is becoming a reliability concern for scaled technology nodes. Especially high-power analog applications like high efficiency PAs and RF-switches undergo to strong lateral field when V g

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Main Authors: Cattaneo, A., Pinarello, S., Mueller, J.-E, Weigel, R.
Format: Conference Proceeding
Language:English
Subjects:
Degradation
MOSFET
Performance evaluation
Predictive models
Radio frequency
Reliability
Stress
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creator Cattaneo, A.
Pinarello, S.
Mueller, J.-E
Weigel, R.
description The increase of leakage current in deep-submicrometer MOS transistors operated below threshold is becoming a reliability concern for scaled technology nodes. Especially high-power analog applications like high efficiency PAs and RF-switches undergo to strong lateral field when V g
doi_str_mv 10.1109/IRPS.2015.7112835
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Especially high-power analog applications like high efficiency PAs and RF-switches undergo to strong lateral field when V g &lt;;V th . Indeed an increased degradation for these MOS applications was already reported in the state of the art but not completely understood. In this paper a thorough study of the DC non-conducting (NC) stress is presented and a new physical model describing the worsening of the electrical parameter is proposed. This model is suitable for being extended to the high frequency regime by means of a quasi-static sum (QS). For the first time RF stress measurements are conducted in various NC configurations. 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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Degradation
MOSFET
Performance evaluation
Predictive models
Radio frequency
Reliability
Stress
title Impact of DC and RF non-conducting stress on nMOS reliability
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