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An Analog Front-End IC Design for 320 \times 240 Microbolometer Array Applications
We propose an analog front-end integrated circuit (IC) design for a readout IC (ROIC), which applies a fixed- voltage-bias sensing method with a capacitance transimpedance amplifier (CTIA) to an input stage in order to simplify the circuit structure of the ROIC and the IR sensor characteristic contr...
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Published in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2015-11, Vol.62 (11), p.1048-1052 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | We propose an analog front-end integrated circuit (IC) design for a readout IC (ROIC), which applies a fixed- voltage-bias sensing method with a capacitance transimpedance amplifier (CTIA) to an input stage in order to simplify the circuit structure of the ROIC and the IR sensor characteristic control. For a sample-and-hold stage, in order to display and control a signal detected by the IR sensor using a 2-D focal plane array, a differential delta sampling circuit is proposed, which effectively removes the fixed pattern noise. In addition, a two-stage variable-gain amplifier equipped with a rail-to-rail fully differential operational amplifier is applied to the ROIC to achieve high voltage sensitivity. The output characteristic of the proposed device is 30.84 mV/K and the linearity error rate is less than 0.07%. After checking the performance of the ROIC using an HSPICE simulation, the chip is manufactured and measured using the United Microelectronics Corporation Japan 0.35-μm standard CMOS process to confirm that the simulation results from the actual design are in close agreement with the measurement results. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2015.2455391 |