An MMIC low-noise amplifier design technique

In this paper we propose a parallel two-finger unit transistor MMIC low-noise amplifier design technique which enables the design of wideband and high linearity low-noise amplifiers with very stable, predictable, and repeatable operation. We prove the feasibility of the proposed design technique by...

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Bibliographic Details
Main Authors: Varonen, M., Reeves, R., Kangaslahti, P., Samoska, L., Cleary, K., Akgiray, A., Gawande, R., Fung, A., Gaier, T., Weinreb, S., Readhead, A. C. S., Lawrence, C., Sarkozy, S., Lai, R.
Format: Conference Proceeding
Language:English
Subjects:
Cryogenic
Extraterrestrial measurements
HEMTs
III-V semiconductor materials
Indium phosphide
InP HEMT
low-noise amplifiers (LNAs)
MMIC
MMICs
Topology
Wiring
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Summary:In this paper we propose a parallel two-finger unit transistor MMIC low-noise amplifier design technique which enables the design of wideband and high linearity low-noise amplifiers with very stable, predictable, and repeatable operation. We prove the feasibility of the proposed design technique by demonstrating a three-stage LNA packaged in a WR10 waveguide housing and fabricated using a 35-nm InP HEMT technology that achieves more than a 20-dB gain from 75 to 116 GHz and 26-33-K noise temperature from 85 to 116 GHz when cryogenically cooled to 27 K.
ISSN:0149-645X
2576-7216
DOI:10.1109/MWSYM.2015.7166997