A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna

This paper presents a low-power RF-CMOS-transceiver IC-module with small antennas on a printed circuit board (PCB). Active mixer-first architecture is employed on a receiver for achieving both acceptable sensitivity and lower power. We also show strategies for lowering power consumption of the trans...

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Bibliographic Details
Main Authors: Ishikawa, Yosuke, Sang-yeop Lee, Yonezawa, Shin, Sho Ikeda, Yiming Fang, Hamada, Taisuke, Ito, Hiroyuki, Ishihara, Noboru, Masu, Kazuya
Format: Conference Proceeding
Language:English
Subjects:
Antennas
Phase locked loops
Power demand
Radio frequency
Receivers
Transceivers
Transmitters
Online Access:Request full text
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Summary:This paper presents a low-power RF-CMOS-transceiver IC-module with small antennas on a printed circuit board (PCB). Active mixer-first architecture is employed on a receiver for achieving both acceptable sensitivity and lower power. We also show strategies for lowering power consumption of the transmitter and the phase locked loop (PLL): a high-gain inverter-based resonant-driver and a current-reuse voltage controlled oscillator (VCO). Power saving of the RF circuits is achieved with low supply-voltage design under 0.5V by exploiting forward body bias technique. The use of 5.5-GHz band and a J-shaped folded monopole antennas (JFMA) on the PCB enable to reduce the module footprint, and the module size of 0.78 cc is realized. The proposed transceiver circuit is fabricated in 65 nm CMOS process technology and is mounted on the PCB. 5.5-GHz RF-transceiver operation is succeeded with small power consumption of 1.56 mW under 0.5-V power supply. Output signal-power of the transmitter is -23.2 dBm, and receiver sensitivity is -61.2 dBm.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2015.7168859