A fully-hardwired implementation of large vocabulary continuous speech recognizer

This article presents the hardware implementation of the speech recognition for real time performance and high-level accuracy. The stand-alone speech recognizer should simultaneously achieve the requirements, which are the low-latency performance and the low-power dissipation in an environment that...

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Bibliographic Details
Main Authors: Yunjoo Kim, Juyeob Kim, Joohyun Lee, Wonjong Kim
Format: Conference Proceeding
Language:English
Subjects:
Consumer electronics
FPGA
Hidden Markov Model
Speech Recognition
Online Access:Request full text
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Summary:This article presents the hardware implementation of the speech recognition for real time performance and high-level accuracy. The stand-alone speech recognizer should simultaneously achieve the requirements, which are the low-latency performance and the low-power dissipation in an environment that cannot connect to the network. So, we made a speech recognizer as the hardware accelerator based on the hidden Markov model for reducing the load of the system processor without the cloud computing. Our overall design has the fully hardwired operation flow from the generation of the speech feature to the generation of the recognized words. Our design showed low-latency performance as the real time factor of 0.4 ~ 0.5 on FPGA, which operates at 100MHz operating frequency and uses the resource of 10%.
ISSN:0747-668X
2159-1423
DOI:10.1109/ISCE.2015.7177803