In/out pad electrostatic discharge protection for sub-micron integrated circuits based on lateral bipolar transistor

Current status is presented for the development and experimental verifcation of 0.18 μm high voltage CMOS integrated circuits with pad-based ESD protection made with the use of lateral bipolar transistor. Developed I/O pads provide 2000 V ESD protection.

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Bibliographic Details
Main Authors: Karpovich, Maksim S., Pichugin, Igor V., Vasilyev, Vladislav Yu
Format: Conference Proceeding
Language:English
Subjects:
Bipolar transistors
CMOS
Electrostatic discharges
ESD protection
I/O PAD
Integrated circuit modeling
lateral npn transistor
Layout
Logic gates
Transistors
Online Access:Request full text
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Description
Summary:Current status is presented for the development and experimental verifcation of 0.18 μm high voltage CMOS integrated circuits with pad-based ESD protection made with the use of lateral bipolar transistor. Developed I/O pads provide 2000 V ESD protection.
ISSN:1815-3712
DOI:10.1109/EDM.2015.7184499