System-level performance estimation strategy for sw and hw

The design of an embedded system is a process where the tuning of the architecture should take into account both the functionality and the timing performance while considering the heterogeneity of the hw and sw components. The goal of this paper is to present the new model developed during the SEED...

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Bibliographic Details
Main Authors: Allara, A., Brandolese, C., Fornaciari, W., Salice, F., Sciuto, D.
Format: Conference Proceeding
Language:English
Subjects:
Aerospace industry
Analytical models
Design automation
Electrical capacitance tomography
Embedded system
Process design
Space exploration
Space technology
Testing
Timing
Online Access:Request full text
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Summary:The design of an embedded system is a process where the tuning of the architecture should take into account both the functionality and the timing performance while considering the heterogeneity of the hw and sw components. The goal of this paper is to present the new model developed during the SEED Esprit project, to estimate the software and hardware characteristics for cosimulation and profiling within the TOSCA codesign framework. The impact on the design space exploration of such an high-level cosimulation strategy has been tested by considering as a benchmark the reengineering of an industrial device.
ISSN:1063-6404
2576-6996
DOI:10.1109/ICCD.1998.727022