17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization

The power consumption of a mobile application processor (AP) is strongly limited by the SRAM minimum operating voltage, VMIN [1], since the 6T bit cell must balance between write-ability and bit cell stability. However, the SRAM VMIN scales down gradually with advanced process nodes due to increased...

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Main Authors: Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Jonghoon Jung, Giyong Yang, Sanghoon Baek, Jaeseung Choi, Bongjae Kwon, Yunwoo Lee, Sungbong Kim, Gyuhong Kim, Hyo-Sig Won, Ja-Hum Ku, Paak, Sunhom Steve, Es Jung, Park, Steve Sungho, Kinam Kim
Format: Conference Proceeding
Language:English
Subjects:
Circuit stability
Computer architecture
FinFETs
High definition video
Microprocessors
Random access memory
Resistance
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Summary:The power consumption of a mobile application processor (AP) is strongly limited by the SRAM minimum operating voltage, VMIN [1], since the 6T bit cell must balance between write-ability and bit cell stability. However, the SRAM VMIN scales down gradually with advanced process nodes due to increased variability. This is evident with the quantized device-width and limited process-knobs of a FinFET technology, which has greatly affected SRAM design [2-4]. Therefore, assist-circuits are more crucial in a FinFET technology to improve VMIN, which in turn adds to the Power, Performance, and Area (PPA) gain of SRAM.
ISSN:2376-8606
DOI:10.1109/ISSCC.2016.7418029