6.9-cm2 Active-Area Interconnected Wafer 4-kV p-i-n Diode Pulsed at 55 kA

• Published in: IEEE journal of emerging and selected topics in power electronics 2016-09, Vol.4 (3), p.767-771
• Main Authors: Veliadis, Victor, Snook, Megan, Woodruff, Sharon, Nechay, Bettina, Hearne, Harold, Lavoie, Chris, Giorgi, David, Ingram, Michael
• Format: Article
• Language: English
• Subjects: 4H-SiC; action; di/dt; Dielectrics; full wafer diode; high voltage; Integrated circuit interconnections; Leakage currents; Metals; p-i-n diode; PIN photodiodes; pulsed power; Semiconductor diodes; Silicon carbide; wafer interconnection
• ISSN: 2168-6777; 2168-6785
• DOI: 10.1109/JESTPE.2016.2540518

SiC device area is presently limited by material and processing defects. To meet the large current handling requirements of power conditioning systems, paralleling of a large number of devices is required. This can increase cost and complexity through dicing, soldering, insertion of ballast resistors, and forming multiple wire bonds. Furthermore, paralleling numerous discrete devices increases package volume/weight and reduces power density. To overcome these complexities, 79 p-i-n diodes were interconnected on a 3-in 4H-SiC wafer to form a 6.9-cm 2 active-area full wafer diode. The interconnected wafer diode blocked a voltage of 4 kV at an extremely low leakage current density of 0.07 μA/cm 2 . The wafer diode was subsequently mounted in a hockey puck package and subjected to high power pulsed testing, wherein initial energy stored in a capacitor bank discharged through the interconnected wafer diode into a resistive load. At a pulsed current density of 8 kA/cm 2 and a rise rate of di/dt = 1.3 kA/μs, the interconnected wafer diode conducted a peak current of 54.8 kA and dissipated 149 J. The calculated action was 420 kA 2 -s.