Improved sensitivity for parallel test of substrate interconnections

A digital method has been introduced previously for testing the interconnections between signal pins within high-density substrates such as multichip modules. This technique, while very effective at detecting and diagnosing catastrophic faults (complete opens and low-resistance shorts), has limited...

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Bibliographic Details
Main Authors: Keezer, D.C., Newman, K.E., Davis, J.S.
Format: Conference Proceeding
Language:English
Subjects:
Assembly
Capacitance
Circuit faults
Electrical resistance measurement
Field programmable gate arrays
Integrated circuit interconnections
Logic testing
Multichip modules
Probes
System testing
Online Access:Request full text
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Description
Summary:A digital method has been introduced previously for testing the interconnections between signal pins within high-density substrates such as multichip modules. This technique, while very effective at detecting and diagnosing catastrophic faults (complete opens and low-resistance shorts), has limited sensitivity to "near" failures (resistive opens and high-resistance shorts). This paper quantifies the sensitivity of the original method for detecting several classes of near failures. The sensitivity is found to be on the order of 100 /spl Omega/ for both near opens and near shorts in a typical implementation. To improve upon this, a significant variation on the original method is introduced. Rather than rely entirely on resistance differences to produce detectable voltage variations, the new approach couples these with a fixed capacitance to produce an RC rise-time change. The fault is then diagnosed with greater precision while still using fixed-threshold comparators.
ISSN:1089-3539
2378-2250
DOI:10.1109/TEST.1998.743156