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An Efficient on Chip Power Management Architecture for Solar Energy Harvesting Systems
Extracting maximum energy from an energy transducer/battery, with minimum loss in an interface circuit is one of the primary design goal of a power management system. An efficient on-chip power management architecture is presented for solar energy harvesting system and it has a peak efficiency impro...
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Main Authors: | , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Citations: | Items that cite this one |
Online Access: | Request full text |
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Summary: | Extracting maximum energy from an energy transducer/battery, with minimum loss in an interface circuit is one of the primary design goal of a power management system. An efficient on-chip power management architecture is presented for solar energy harvesting system and it has a peak efficiency improvement of 12% over the traditional architecture. The proposed architecture utilizes single DC-DC converter to maintain regulation at the load, when there is enough and not enough ambient condition to supply load requirements. The proposed power management system has been designed using 0.18-μm CMOS technology node and the circuit simulations demonstrate that the proposed architecture offers system efficiency of 82.4%, under different light conditions. |
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ISSN: | 2380-6923 |
DOI: | 10.1109/VLSID.2016.79 |