Reuse of Substrate Wafers for the Porous Silicon Layer Transfer

• Published in: IEEE journal of photovoltaics 2016-05, Vol.6 (3), p.783-790
• Main Authors: Steckenreiter, Verena, Hensen, Jan, Knorr, Alwina, Kajari-Schroder, Sarah, Brendel, Rolf
• Format: Article
• Language: English
• Subjects: Carrier lifetime; Charge carrier lifetime; Contamination; Deposition; Double layer; Epitaxial growth; epitaxial layer; Epitaxial layers; layer transfer; Minority carriers; Photovoltaic systems; porous silicon (PSI) process; Reuse; Silicon; Silicon substrates; substrate reuse; Substrates; Wafers
• ISSN: 2156-3381; 2156-3403
• DOI: 10.1109/JPHOTOV.2016.2545406

The reuse of the silicon substrate is a key component in the kerfless-porous-silicon-based wafering process. Starting with a boron-doped p + -type substrate, a porous double layer is created, reorganized in a hydrogen bake, and then serves as a substrate for silicon homoepitaxy. After lift-off, the silicon substrate is wet chemically reconditioned and reporosified to serve again as a substrate for epitaxial layer deposition. We reduce the substrate consumption per cycle to 5 ± 0.3 μm/side and demonstrate 14 uses on a 6-in wafer. We investigate the impact of the reuse sequence on the epitaxial layer quality by carrier lifetime measurements. Starting with the third reuse, a pattern becomes visible in lifetime mappings. We observe a degradation of the minority carrier lifetime from 15 to 7 μs after 13 reuses.