Loss Mechanisms and Optimum Design Methodology for Efficient mm-Waves Class-E PAs

In this paper, loss mechanisms of monolithic high frequency Class-E PAs are studied. The switching behavior is analyzed to understand the discrepancy between common design equations and optimal design values as frequency scales up. Analytical results are verified by spice simulations. In addition, a...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2016-06, Vol.63 (6), p.773-784
Main Authors: El-Aassar, Omar, El-Nozahi, Mohamed, Ragai, Hani Fikry
Format: Article
Language:English
Subjects:
Capacitance
Circuits
Class-E PA
CMOS
Design analysis
Design engineering
Design methodology
Inductors
integrated CMOS IC
Mathematical analysis
Mathematical model
millimeter-waves
Optimization
PAS
Power generation
Q-factor
Simulation
Switches
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Summary:In this paper, loss mechanisms of monolithic high frequency Class-E PAs are studied. The switching behavior is analyzed to understand the discrepancy between common design equations and optimal design values as frequency scales up. Analytical results are verified by spice simulations. In addition, a design recipe based on loss analysis and effective output duty cycle is proposed for mm-waves PAs to boost their power added efficiency (PAE). The design approach is adopted to compare different technology nodes including the 130 nm, 90 nm, and 65 nm bulk CMOS. Newer technologies show better PAE only at the mm-waves regime. Simulations show that the PAE is boosted from 31% to 40% when the proposed design methodology is applied at 60 GHz using the 65 nm node.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2016.2537999