Transistor matching in analog CMOS applications

This paper gives an overview of MOSFET mismatch effects that form a performance/yield limitation for many designs. After a general description of (mis)matching, a comparison over past and future process generations is presented. The application of the matching model in CAD and analog circuit design...

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Bibliographic Details
Main Authors: Pelgrom, M.J.M., Tuinhout, H.P., Vertregt, M.
Format: Conference Proceeding
Language:English
Subjects:
Analog circuits
Analog-digital conversion
Clocks
Design automation
Doping
Laboratories
MOSFET circuits
Multiplexing
Neodymium
Threshold voltage
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Description
Summary:This paper gives an overview of MOSFET mismatch effects that form a performance/yield limitation for many designs. After a general description of (mis)matching, a comparison over past and future process generations is presented. The application of the matching model in CAD and analog circuit design is discussed. Mismatch effects gain importance as critical dimensions and CMOS power supply voltages decrease.
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1998.746503