Porous silicon technology for RF integrated circuit applications

Coplanar transmission lines were fabricated on porous silicon layers of varying thickness, in the range of 1-15 /spl mu/m, on silicon substrates. For suitably thick porous silicon regions, the capacitive coupling to the conducting silicon substrate and the associated attenuation are suppressed. The...

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Bibliographic Details
Main Authors: Welty, R.J., Park, S.H., Asbeck, P.M., Dancil, K.-P.S., Sailor, M.J.
Format: Conference Proceeding
Language:English
Subjects:
Application specific integrated circuits
Attenuation
Coplanar transmission lines
Coupling circuits
Distributed parameter circuits
Integrated circuit technology
Monolithic integrated circuits
Radio frequency
Radiofrequency integrated circuits
Silicon
Online Access:Request full text
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Description
Summary:Coplanar transmission lines were fabricated on porous silicon layers of varying thickness, in the range of 1-15 /spl mu/m, on silicon substrates. For suitably thick porous silicon regions, the capacitive coupling to the conducting silicon substrate and the associated attenuation are suppressed. The use of porous silicon layers thus provides an approach to incorporate high performance transmission lines in a silicon-based monolithic integrated circuit process.
DOI:10.1109/SMIC.1998.750212