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An analog associative memory chip for VQ image compression
This paper presents a hardware implementation of full-search vector quantization image compression using an associative memory chip based on analog flash technology. Taking advantage of the features of this architecture, that performs a parallel search on 4 K 64-elements codebook in 4.6 /spl mu/s, e...
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container_end_page | 1968 vol.4 |
container_issue | |
container_start_page | 1965 |
container_title | |
container_volume | 4 |
creator | Navoni, L. Besana, M. Rolandi, P.L. |
description | This paper presents a hardware implementation of full-search vector quantization image compression using an associative memory chip based on analog flash technology. Taking advantage of the features of this architecture, that performs a parallel search on 4 K 64-elements codebook in 4.6 /spl mu/s, encouraging results have been obtained in terms of perceived image quality and computation speed. |
doi_str_mv | 10.1109/ICASSP.1999.758311 |
format | conference_proceeding |
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No.99CH36258)</title><addtitle>ICASSP</addtitle><description>This paper presents a hardware implementation of full-search vector quantization image compression using an associative memory chip based on analog flash technology. Taking advantage of the features of this architecture, that performs a parallel search on 4 K 64-elements codebook in 4.6 /spl mu/s, encouraging results have been obtained in terms of perceived image quality and computation speed.</description><subject>Analog computers</subject><subject>Associative memory</subject><subject>Computer architecture</subject><subject>Concurrent computing</subject><subject>Decoding</subject><subject>Distortion measurement</subject><subject>Hardware</subject><subject>High performance computing</subject><subject>Image coding</subject><subject>Image quality</subject><issn>1520-6149</issn><issn>2379-190X</issn><isbn>0780350413</isbn><isbn>9780780350410</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1999</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotz11LwzAYBeDgB1jn_sCu8gda8zZJk9e7MfyCgcpUvBtp-nZG1qY0Q9i_tzDPzbk7PIexBYgCQODt82q52bwWgIiF0VYCnLGslAZzQPF1zq6FsUJqoUBesAx0KfIKFF6xeUo_YorSWhiZsbtlz13v9nHHXUrRB3cIv8Q76uJ45P47DLyNI_9846FzO-I-dsNIKYXY37DL1u0Tzf97xj4e7t9XT_n65XHyrfMARh1y09oarasJnJmcpSkrZT02CsmSFKDl5K6dJIW2rEBo8s4SaYDGGN94OWOL024gou0wTpDxuD29ln_OZ0jW</recordid><startdate>1999</startdate><enddate>1999</enddate><creator>Navoni, L.</creator><creator>Besana, M.</creator><creator>Rolandi, P.L.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>1999</creationdate><title>An analog associative memory chip for VQ image compression</title><author>Navoni, L. ; Besana, M. ; Rolandi, P.L.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i174t-7f8b98abe1a7311272648c9d49e8e30153237ba3e49826105eca8ee511d77cdc3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1999</creationdate><topic>Analog computers</topic><topic>Associative memory</topic><topic>Computer architecture</topic><topic>Concurrent computing</topic><topic>Decoding</topic><topic>Distortion measurement</topic><topic>Hardware</topic><topic>High performance computing</topic><topic>Image coding</topic><topic>Image quality</topic><toplevel>online_resources</toplevel><creatorcontrib>Navoni, L.</creatorcontrib><creatorcontrib>Besana, M.</creatorcontrib><creatorcontrib>Rolandi, P.L.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Navoni, L.</au><au>Besana, M.</au><au>Rolandi, P.L.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An analog associative memory chip for VQ image compression</atitle><btitle>1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258)</btitle><stitle>ICASSP</stitle><date>1999</date><risdate>1999</risdate><volume>4</volume><spage>1965</spage><epage>1968 vol.4</epage><pages>1965-1968 vol.4</pages><issn>1520-6149</issn><eissn>2379-190X</eissn><isbn>0780350413</isbn><isbn>9780780350410</isbn><abstract>This paper presents a hardware implementation of full-search vector quantization image compression using an associative memory chip based on analog flash technology. Taking advantage of the features of this architecture, that performs a parallel search on 4 K 64-elements codebook in 4.6 /spl mu/s, encouraging results have been obtained in terms of perceived image quality and computation speed.</abstract><pub>IEEE</pub><doi>10.1109/ICASSP.1999.758311</doi></addata></record> |
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identifier | ISSN: 1520-6149 |
ispartof | 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258), 1999, Vol.4, p.1965-1968 vol.4 |
issn | 1520-6149 2379-190X |
language | eng |
recordid | cdi_ieee_primary_758311 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Analog computers Associative memory Computer architecture Concurrent computing Decoding Distortion measurement Hardware High performance computing Image coding Image quality |
title | An analog associative memory chip for VQ image compression |
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