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On synthesis of manufacturable and testable analog integrated circuits
In order to maximize chip yield, both design centering and tolerance design find the optimal solutions on both nominal parameter values and tolerances. However, the approaches require a tremendous amount of computation time to find an optimal solution. Based on the sensitivity analysis, an alternati...
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Main Authors: | , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | In order to maximize chip yield, both design centering and tolerance design find the optimal solutions on both nominal parameter values and tolerances. However, the approaches require a tremendous amount of computation time to find an optimal solution. Based on the sensitivity analysis, an alternative process for synthesizing manufacturable and testable analog ICs is presented. The developed process takes the desired manufacturability to define the bounds of acceptability region for the parameter space and then maps the parameter bounds to performance bounds. Based on the given design specifications, i.e., performance bounds, optimal solutions on the parameters are selected. The process guarantees the circuit with the selected parameters and the specified parameter tolerances will satisfy the design specifications with the desired manufacturability. Since the performance bounds are defined in this process, the frequencies that cause higher sensitivities are selected as the test frequencies so that the designed analog circuits can be fully testable. |
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DOI: | 10.1109/MWSCAS.1998.759501 |