Diagnosing single faults for interconnects in SRAM based FPGAs

This paper presents a method to diagnose faults in FPGA interconnection resources. A single fault model is given. Under the given model, a diagnosing method is proposed. At most five programming steps in the proposed method is required if adaptive testing scheme is used. For non-adaptive test, eight...

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Bibliographic Details
Main Authors: Yinlei Yu, Jian Xu, Wei Kang Huang, Lombardi, F.
Format: Conference Proceeding
Language:English
Subjects:
Application specific integrated circuits
Bridges
Circuit faults
Field programmable gate arrays
Integrated circuit interconnections
Laboratories
Logic programming
Logic testing
Random access memory
Switches
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Description
Summary:This paper presents a method to diagnose faults in FPGA interconnection resources. A single fault model is given. Under the given model, a diagnosing method is proposed. At most five programming steps in the proposed method is required if adaptive testing scheme is used. For non-adaptive test, eight programming steps is required to diagnose all the possible faults under the given single fault model. The accuracy of the fault diagnosing is one segment for a segment stuck-at or stuck-open fault, a segment pair for a bridge fault, a switch for switch stuck-on or stuck-off fault.
DOI:10.1109/ASPDAC.1999.760014