Junctionless Poly-Si Nanowire Transistors With Low-Temperature Trimming Process for Monolithic 3-D IC Application

In this paper, the junctionless (JL) ultrathin polycrystalline-Si (poly-Si) nanowire (NW) transistors with gate-all-around configuration and raised source/drain were successfully fabricated by a low-temperature trimming process. The 140 °C-heated phosphoric acid (HPA) was adopted for trimming the ch...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on electron devices 2016-12, Vol.63 (12), p.4998-5003
Main Authors: Lin, Jer-Yi, Kuo, Po-Yi, Lin, Ko-Li, Chin, Chun-Chieh, Chao, Tien-Sheng
Format: Article
Language:English
Subjects:
3-D ICs
Doping
Fabrication
gate-all-around (GAA)
Integrated circuits
junctionless (JL)
Low temperature
nanowire (NW)
Nanowires
Performance evaluation
Phosphoric acid
polycrystalline-Si (poly-Si) thin-film transistors
Polysilicon
Semiconductor devices
Thin film transistors
Three-dimensional integrated circuits
Transistors
Trimming
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this paper, the junctionless (JL) ultrathin polycrystalline-Si (poly-Si) nanowire (NW) transistors with gate-all-around configuration and raised source/drain were successfully fabricated by a low-temperature trimming process. The 140 °C-heated phosphoric acid (HPA) was adopted for trimming the channel dimension, which exhibits a near roughness degradation-free etching and excellent trimming uniformity. As the HPA immersing time increased, the channel dimension was thinned and narrowed, resulting in the greater electrostatic integrity. Therefore, the steep subthreshold swing ~75 mV/decade, low drain-induced barrier lowering ~33 mV/V, and high on/off currents ratio (ION/IOFF) ~ 7 x 106 can be achieved. These superior characteristics of low-temperature JL poly-Si NW transistors are promising candidates for the low thermal budget monolithic 3-D ICs and the system on panel applications in the future.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2016.2615805