Estimation of ground bounce effects on CMOS circuits

Ground bounce estimation is important to determine the impact of simultaneous switching of input/output (I/O) drivers and clock drivers on the performance of application-specific integrated circuits (ASIC's). In this paper, we develop models to estimate the peak and damped resonance noise of th...

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Bibliographic Details
Published in:IEEE transactions on components and packaging technologies 1999-06, Vol.22 (2), p.316-325
Main Authors: Kabbani, A., Al-Khalili, A.J.
Format: Article
Language:English
Subjects:
Application specific integrated circuits
Channels
Circuit noise
Circuits
Clock drivers
Clocks
CMOS
CMOS technology
Driver circuits
Drivers
Grounds
Inductance
Integrated circuit noise
Integrated circuits
Packaging
Power supplies
Semiconductor device modeling
Switching
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Summary:Ground bounce estimation is important to determine the impact of simultaneous switching of input/output (I/O) drivers and clock drivers on the performance of application-specific integrated circuits (ASIC's). In this paper, we develop models to estimate the peak and damped resonance noise of the ground and power bounce. These models are developed for both long and short channel devices. Comparison with H-simulation program with integrated circuit emphasis (HSPICE) simulation indicates a good match. These models are simple and suitable for hand calculation.
ISSN:1521-3331
1557-9972
DOI:10.1109/6144.774752