CSP die shrink solution for memory devices [DRAMs]

The purpose of this study was to show the effectiveness of die shrink as a package solution for memory devices. In the case of the 8 mm/spl times/10 mm Direct Rambus DRAM device, about 350 dies can be obtained from a single 8-inch wafer. The 85% linear shrink (15% shrink in both x and y-directions)...

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Bibliographic Details
Main Authors: Kim, Y.G., Gamini, N., Mitchell, C.
Format: Conference Proceeding
Language:English
Subjects:
Assembly
Bandwidth
Bonding
Chip scale packaging
Costs
Electronics packaging
Random access memory
Sockets
Testing
Wafer scale integration
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Description
Summary:The purpose of this study was to show the effectiveness of die shrink as a package solution for memory devices. In the case of the 8 mm/spl times/10 mm Direct Rambus DRAM device, about 350 dies can be obtained from a single 8-inch wafer. The 85% linear shrink (15% shrink in both x and y-directions) allows an additional 150 dies from the same size wafer. This simple calculation explains the importance of die shrink. There are two basic requirements for the die shrink package solution. First, the footprint of the new package must be the same as that of the earlier package because a mounting board with multiple devices on it can not be changed to accommodate the footprint change of single device. Second, the test socket for the new package must be the same or compatible with minimal modification because the delivery time and expense for new sockets for test and burn-in are significant. The solution is limited to the /spl mu/BGA package only. A ball matrix was used.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.1999.776245