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Scanning capacitance microscopy analysis of dram trench capacitors
Two dimensional dopant concentrations of the side walls of trench capacitor cells of dynamic random access memory devices were profiled using the scanning capacitance microscopy technique. This technique permits the first direct study and semi-quantification of the dopant profiles in the silicon sub...
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creator | Pey, K.L. Strausser, Y.E. Erickson, A.N. Leslie, A.J. Beh, M.T.F. Sheng, T.T. |
description | Two dimensional dopant concentrations of the side walls of trench capacitor cells of dynamic random access memory devices were profiled using the scanning capacitance microscopy technique. This technique permits the first direct study and semi-quantification of the dopant profiles in the silicon substrate as a function of trench depth. The SCM results indicate that for a fixed trench depth, the dopant profiles in any radial direction of the trench are consistent. However, difference in dopant distribution is clearly revealed between areas that are very close to the top of the trench and those situated deep in the silicon substrate. Variation in the SCM signal at the n+ doped bit-line contacts of the transfer gate transistor is attributed to possibly dopant redistribution during contact formation process. |
doi_str_mv | 10.1109/MTDT.1996.782496 |
format | conference_proceeding |
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This technique permits the first direct study and semi-quantification of the dopant profiles in the silicon substrate as a function of trench depth. The SCM results indicate that for a fixed trench depth, the dopant profiles in any radial direction of the trench are consistent. However, difference in dopant distribution is clearly revealed between areas that are very close to the top of the trench and those situated deep in the silicon substrate. Variation in the SCM signal at the n+ doped bit-line contacts of the transfer gate transistor is attributed to possibly dopant redistribution during contact formation process.</description><identifier>ISSN: 1087-4852</identifier><identifier>ISBN: 0818674660</identifier><identifier>ISBN: 9780818674662</identifier><identifier>EISSN: 2576-9154</identifier><identifier>DOI: 10.1109/MTDT.1996.782496</identifier><language>eng</language><publisher>IEEE</publisher><subject>Atomic force microscopy ; Capacitance ; Capacitive sensors ; Capacitors ; Probes ; Random access memory ; Sensor phenomena and characterization ; Silicon ; Substrates ; Voltage</subject><ispartof>IEEE International Workshop on Memory Technology, Design and Testing, 1996, p.79-85</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/782496$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2057,4049,4050,27924,54554,54919,54931</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/782496$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Pey, K.L.</creatorcontrib><creatorcontrib>Strausser, Y.E.</creatorcontrib><creatorcontrib>Erickson, A.N.</creatorcontrib><creatorcontrib>Leslie, A.J.</creatorcontrib><creatorcontrib>Beh, M.T.F.</creatorcontrib><creatorcontrib>Sheng, T.T.</creatorcontrib><title>Scanning capacitance microscopy analysis of dram trench capacitors</title><title>IEEE International Workshop on Memory Technology, Design and Testing</title><addtitle>MTDT</addtitle><description>Two dimensional dopant concentrations of the side walls of trench capacitor cells of dynamic random access memory devices were profiled using the scanning capacitance microscopy technique. This technique permits the first direct study and semi-quantification of the dopant profiles in the silicon substrate as a function of trench depth. The SCM results indicate that for a fixed trench depth, the dopant profiles in any radial direction of the trench are consistent. However, difference in dopant distribution is clearly revealed between areas that are very close to the top of the trench and those situated deep in the silicon substrate. Variation in the SCM signal at the n+ doped bit-line contacts of the transfer gate transistor is attributed to possibly dopant redistribution during contact formation process.</description><subject>Atomic force microscopy</subject><subject>Capacitance</subject><subject>Capacitive sensors</subject><subject>Capacitors</subject><subject>Probes</subject><subject>Random access memory</subject><subject>Sensor phenomena and characterization</subject><subject>Silicon</subject><subject>Substrates</subject><subject>Voltage</subject><issn>1087-4852</issn><issn>2576-9154</issn><isbn>0818674660</isbn><isbn>9780818674662</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1996</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1j7lOAzEUAC0OiU2gR1T-gV18-7mEEA4piILto7eODUbZQ_Y2-_cUgWqa0UhDyC1nDefM3b-3T23DnTONBaGcOSOV0NbUjmt1TlYMOBirjGEXpOIMbK1AiyuyKuWHMcG4goo8fnochjR8UY8T-jTj4APtk89j8eO0UBzwuJRU6BjpIWNP5xwG__2vj7lck8uIxxJu_rgm7fO23bzWu4-Xt83Drk5g5zp4E6WNjPOD1OhE0BGlEz4o1mkP1kRvvObCKQUgO6s7sK4zgM4JCxblmtydsimEsJ9y6jEv-9O5_AWlkksw</recordid><startdate>1996</startdate><enddate>1996</enddate><creator>Pey, K.L.</creator><creator>Strausser, Y.E.</creator><creator>Erickson, A.N.</creator><creator>Leslie, A.J.</creator><creator>Beh, M.T.F.</creator><creator>Sheng, T.T.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1996</creationdate><title>Scanning capacitance microscopy analysis of dram trench capacitors</title><author>Pey, K.L. ; Strausser, Y.E. ; Erickson, A.N. ; Leslie, A.J. ; Beh, M.T.F. ; Sheng, T.T.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i87t-ec6f37f011d35a92e5fa392ce40b5c876fc6c512944883b75b879b68a992787a3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1996</creationdate><topic>Atomic force microscopy</topic><topic>Capacitance</topic><topic>Capacitive sensors</topic><topic>Capacitors</topic><topic>Probes</topic><topic>Random access memory</topic><topic>Sensor phenomena and characterization</topic><topic>Silicon</topic><topic>Substrates</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Pey, K.L.</creatorcontrib><creatorcontrib>Strausser, Y.E.</creatorcontrib><creatorcontrib>Erickson, A.N.</creatorcontrib><creatorcontrib>Leslie, A.J.</creatorcontrib><creatorcontrib>Beh, M.T.F.</creatorcontrib><creatorcontrib>Sheng, T.T.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Pey, K.L.</au><au>Strausser, Y.E.</au><au>Erickson, A.N.</au><au>Leslie, A.J.</au><au>Beh, M.T.F.</au><au>Sheng, T.T.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Scanning capacitance microscopy analysis of dram trench capacitors</atitle><btitle>IEEE International Workshop on Memory Technology, Design and Testing</btitle><stitle>MTDT</stitle><date>1996</date><risdate>1996</risdate><spage>79</spage><epage>85</epage><pages>79-85</pages><issn>1087-4852</issn><eissn>2576-9154</eissn><isbn>0818674660</isbn><isbn>9780818674662</isbn><abstract>Two dimensional dopant concentrations of the side walls of trench capacitor cells of dynamic random access memory devices were profiled using the scanning capacitance microscopy technique. This technique permits the first direct study and semi-quantification of the dopant profiles in the silicon substrate as a function of trench depth. The SCM results indicate that for a fixed trench depth, the dopant profiles in any radial direction of the trench are consistent. However, difference in dopant distribution is clearly revealed between areas that are very close to the top of the trench and those situated deep in the silicon substrate. Variation in the SCM signal at the n+ doped bit-line contacts of the transfer gate transistor is attributed to possibly dopant redistribution during contact formation process.</abstract><pub>IEEE</pub><doi>10.1109/MTDT.1996.782496</doi><tpages>7</tpages></addata></record> |
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identifier | ISSN: 1087-4852 |
ispartof | IEEE International Workshop on Memory Technology, Design and Testing, 1996, p.79-85 |
issn | 1087-4852 2576-9154 |
language | eng |
recordid | cdi_ieee_primary_782496 |
source | IEEE Xplore All Conference Series |
subjects | Atomic force microscopy Capacitance Capacitive sensors Capacitors Probes Random access memory Sensor phenomena and characterization Silicon Substrates Voltage |
title | Scanning capacitance microscopy analysis of dram trench capacitors |
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