Fault Modeling and Worst Case Test Vector Generation for Flash-Based FPGAs Exposed to Total Dose

We analyzed the delay failure induced in flash-based field-programmable gate arrays (FPGAs) exposed to total-ionizing dose. We developed a novel cell-level fault model for such delay failure. We introduced a novel methodology for identifying worst case test vectors (WCTVs) for flash-based FPGA devic...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2017-08, Vol.64 (8), p.2250-2258
Main Authors: Abou-Auf, A. A., Abdel-Aziz, M. M., Abdel-Aziz, M. A., Ammar, A. A.
Format: Article
Language:English
Subjects:
Circuit faults
Cobalt
Cobalt 60
Delay
Delays
Exposure
Failure analysis
Field programmable gate arrays
field-programmable gate arrays (FPGAs)
Gate arrays
Integrated circuit modeling
Libraries
Mathematical analysis
Pattern generation
Propagation delay
Routing
Test pattern generators
testing techniques
total dose effects
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Description
Summary:We analyzed the delay failure induced in flash-based field-programmable gate arrays (FPGAs) exposed to total-ionizing dose. We developed a novel cell-level fault model for such delay failure. We introduced a novel methodology for identifying worst case test vectors (WCTVs) for flash-based FPGA devices exposed to total-ionizing dose based on the developed fault model for delay failure. We introduced a novel methodology to identify WCTVs for flash-based FPGAs using commercially available design and automatic test pattern generation tools. We validated the delay fault model using Microsemi ProASIC3 FPGAs and Cobalt 60 facility. The experimental results also show significant impact on the total-dose failure levels when using WCTVs.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2017.2687982