Context-switching techniques for decoupled multithreaded processors

Multithreading techniques use coarse grain parallelism to speed up computation of a multithreaded workload by better utilization of the resources of a single processor. The paper surveys context switching techniques for multithreaded single-issue processors and classifies the techniques due to the e...

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Bibliographic Details
Main Authors: Kreuzinger, J., Ungerer, T.
Format: Conference Proceeding
Language:English
Subjects:
Counting circuits
Delay
Fault tolerance
Hazards
Interleaved codes
Pipelines
Reduced instruction set computing
Registers
Switches
Yarn
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Summary:Multithreading techniques use coarse grain parallelism to speed up computation of a multithreaded workload by better utilization of the resources of a single processor. The paper surveys context switching techniques for multithreaded single-issue processors and classifies the techniques due to the events that trigger a context switch. We survey static and dynamic block interleaving techniques and demonstrate the application of several techniques in the decoupled multithreaded Rhamma processor. We show that a speed-up of up to 2.1 can be reached with four threads over a single-threaded base processor.
ISSN:1089-6503
2376-9505
DOI:10.1109/EURMIC.1999.794476